@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
.syntax unified
.globl _func
adcs r0, r1, r3, lsl #7
adc.w r0, r1, r3, lsr #31
adcs.w r0, r1, r3, asr #32
- add r2, sp, ip
@ CHECK: adc.w r4, r5, r6 @ encoding: [0x45,0xeb,0x06,0x04]
@ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04]
@ CHECK: adcs.w r0, r1, r3, lsl #7 @ encoding: [0x51,0xeb,0xc3,0x10]
@ CHECK: adc.w r0, r1, r3, lsr #31 @ encoding: [0x41,0xeb,0xd3,0x70]
@ CHECK: adcs.w r0, r1, r3, asr #32 @ encoding: [0x51,0xeb,0x23,0x00]
-@ CHECK: add.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
@------------------------------------------------------------------------------
adds r2, r2, #56
adds r2, #56
add r1, r7, #0xcbcbcbcb
+ add sp, sp, #0x1fe0000
adds.w r2, #-16
adds.w r2, r2, #-16
@ CHECK: adds r2, #56 @ encoding: [0x38,0x32]
@ CHECK: adds r2, #56 @ encoding: [0x38,0x32]
@ CHECK: add.w r1, r7, #3419130827 @ encoding: [0x07,0xf1,0xcb,0x31]
+@ CHECK: add.w sp, sp, #33423360 @ encoding: [0x0d,0xf1,0xff,0x7d]
@ CHECK: subs.w r2, r2, #16 @ encoding: [0xb2,0xf1,0x10,0x02]
@ CHECK: subs.w r2, r2, #16 @ encoding: [0xb2,0xf1,0x10,0x02]
@------------------------------------------------------------------------------
-@ ADD (register)
+@ ADD (register, not SP) A8.8.6
@------------------------------------------------------------------------------
add r1, r2, r8
add r5, r9, r2, asr #32
adds r7, r3, r1, lsl #31
adds.w r0, r3, r6, lsr #25
add.w r4, r8, r1, ror #12
+ adds r1, r1, r7 // T1
+ it eq
+ addeq r1, r3, r5 // T1
+ it eq
+ addeq r1, r1, r5 // T1
+ it eq
+ addseq r1, r3, r5 // T3
+ it eq
+ addseq r1, r1, r5 // T3
add r10, r8
add r10, r10, r8
+ it eq
+ addeq r1, r10 // T2
+ it eq
+ addseq r1, r10 // T3
@ CHECK: add.w r1, r2, r8 @ encoding: [0x02,0xeb,0x08,0x01]
@ CHECK: add.w r5, r9, r2, asr #32 @ encoding: [0x09,0xeb,0x22,0x05]
@ CHECK: adds.w r7, r3, r1, lsl #31 @ encoding: [0x13,0xeb,0xc1,0x77]
@ CHECK: adds.w r0, r3, r6, lsr #25 @ encoding: [0x13,0xeb,0x56,0x60]
@ CHECK: add.w r4, r8, r1, ror #12 @ encoding: [0x08,0xeb,0x31,0x34]
+@ CHECK: adds r1, r1, r7 @ encoding: [0xc9,0x19]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addeq r1, r3, r5 @ encoding: [0x59,0x19]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addeq r1, r1, r5 @ encoding: [0x49,0x19]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addseq.w r1, r3, r5 @ encoding: [0x13,0xeb,0x05,0x01]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addseq.w r1, r1, r5 @ encoding: [0x11,0xeb,0x05,0x01]
@ CHECK: add r10, r8 @ encoding: [0xc2,0x44]
@ CHECK: add r10, r8 @ encoding: [0xc2,0x44]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addeq r1, r10 @ encoding: [0x51,0x44]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addseq.w r1, r1, r10 @ encoding: [0x11,0xeb,0x0a,0x01]
+
+@------------------------------------------------------------------------------
+@ ADD (SP plus immediate) A8.8.9
+@------------------------------------------------------------------------------
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r7, sp, #1020 // T1
+@ CHECK: addeq r7, sp, #1020 @ encoding: [0xff,0xaf]
+
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq sp, sp, #508 // T2
+@ FIXME: ARMARM says 'addeq sp, sp, #508'
+@ CHECK: addeq sp, #508 @ encoding: [0x7f,0xb0]
+
+ add r7, sp, #15 // T3
+@ CHECK: add.w r7, sp, #15 @ encoding: [0x0d,0xf1,0x0f,0x07]
+ adds r7, sp, #16 // T3
+@ CHECK: adds.w r7, sp, #16 @ encoding: [0x1d,0xf1,0x10,0x07]
+ add r8, sp, #16 // T3
+@ CHECK: add.w r8, sp, #16 @ encoding: [0x0d,0xf1,0x10,0x08]
+
+ addw r6, sp, #1020 // T4
+@ CHECK: addw r6, sp, #1020 @ encoding: [0x0d,0xf2,0xfc,0x36]
+ add r6, sp, #1019 // T4
+@ CHECK: addw r6, sp, #1019 @ encoding: [0x0d,0xf2,0xfb,0x36]
+
+@------------------------------------------------------------------------------
+@ ADD (SP plus register) A8.8.10
+@------------------------------------------------------------------------------
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r8, sp, r8 // T1
+@ CHECK: addeq r8, sp, r8 @ encoding: [0xe8,0x44]
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r8, sp // T1
+@ CHECK: addeq r8, sp @ encoding: [0xe8,0x44]
+
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq sp, r9 // T2
+@ CHECK: addeq sp, r9 @ encoding: [0xcd,0x44]
+
+ add r2, sp, ip // T3
+@ CHECK: add.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r2, sp, ip // T3
+@ CHECK: addeq.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
@------------------------------------------------------------------------------
ands r3, r12, #0xf
and r1, #0xff
and r1, r1, #0xff
+ and r5, r4, #0xffffffff
+ ands r1, r9, #0xffffffff
@ CHECK: and r2, r5, #1044480 @ encoding: [0x05,0xf4,0x7f,0x22]
@ CHECK: ands r3, r12, #15 @ encoding: [0x1c,0xf0,0x0f,0x03]
@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
@ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01]
-
+@ CHECK: and r5, r4, #4294967295 @ encoding: [0x04,0xf0,0xff,0x35]
+@ CHECK: ands r1, r9, #4294967295 @ encoding: [0x19,0xf0,0xff,0x31]
@------------------------------------------------------------------------------
@ AND (register)
beq.w _bar
bmi.w #-183396
-@ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0xb8'A']
- @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
+@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK-BE: b.w _bar @ encoding: [0xf0'A',A,0x90'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x80'A']
- @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
+@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
+@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x80'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
@ CHECK: it eq @ encoding: [0x08,0xbf]
-@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0xb8'A']
- @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
+@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
+@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x90'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: bmi.w #-183396 @ encoding: [0x13,0xf5,0xce,0xa9]
@ BIC
@------------------------------------------------------------------------------
bic r10, r1, #0xf
+ bic r5, r2, #0xffffffff
+ bics r11, r10, #0xffffffff
bic r12, r3, r6
bic r11, r2, r6, lsl #12
bic r8, r4, r1, lsr #11
bic r12, r6, ror #29
@ CHECK: bic r10, r1, #15 @ encoding: [0x21,0xf0,0x0f,0x0a]
+@ CHECK: bic r5, r2, #4294967295 @ encoding: [0x22,0xf0,0xff,0x35]
+@ CHECK: bics r11, r10, #4294967295 @ encoding: [0x3a,0xf0,0xff,0x3b]
@ CHECK: bic.w r12, r3, r6 @ encoding: [0x23,0xea,0x06,0x0c]
@ CHECK: bic.w r11, r2, r6, lsl #12 @ encoding: [0x22,0xea,0x06,0x3b]
@ CHECK: bic.w r8, r4, r1, lsr #11 @ encoding: [0x24,0xea,0xd1,0x28]
@ CHECK: cbnz r7, #6 @ encoding: [0x1f,0xb9]
@ CHECK: cbnz r7, #12 @ encoding: [0x37,0xb9]
@ CHECK: cbz r6, _bar @ encoding: [0x06'A',0xb1'A']
- @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK-BE: cbz r6, _bar @ encoding: [0xb1'A',0x06'A']
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@ CHECK: cbnz r6, _bar @ encoding: [0x06'A',0xb9'A']
- @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
+@ CHECK-BE: cbnz r6, _bar @ encoding: [0xb9'A',0x06'A']
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@------------------------------------------------------------------------------
@ CHECK: cmn.w r2, #2 @ encoding: [0x12,0xf1,0x02,0x0f]
@ CHECK: cmp.w r9, #1 @ encoding: [0xb9,0xf1,0x01,0x0f]
+@------------------------------------------------------------------------------
+@ CPS
+@------------------------------------------------------------------------------
+
+ cpsie f
+ cpsid a
+ cpsie.w f
+ cpsid.w a
+ cpsie i, #3
+ cpsie.w i, #3
+ cpsid f, #9
+ cpsid.w f, #9
+ cps #0
+ cps.w #0
+
+@ CHECK: cpsie f @ encoding: [0x61,0xb6]
+@ CHECK: cpsid a @ encoding: [0x74,0xb6]
+@ CHECK: cpsie.w f @ encoding: [0xaf,0xf3,0x20,0x84]
+@ CHECK: cpsid.w a @ encoding: [0xaf,0xf3,0x80,0x86]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
@------------------------------------------------------------------------------
@ DBG
ldc2l p7, c1, [r8]
ldc2l p8, c0, [r9, #-224]
ldc2l p9, c1, [r10, #-120]!
- ldc2l p10, c2, [r11], #16
- ldc2l p11, c3, [r12], #-72
+ ldc2l p0, c2, [r11], #16
+ ldc2l p1, c3, [r12], #-72
ldc p12, c4, [r0, #4]
ldc p13, c5, [r1]
@ CHECK: ldc2l p7, c1, [r8] @ encoding: [0xd8,0xfd,0x00,0x17]
@ CHECK: ldc2l p8, c0, [r9, #-224] @ encoding: [0x59,0xfd,0x38,0x08]
@ CHECK: ldc2l p9, c1, [r10, #-120]! @ encoding: [0x7a,0xfd,0x1e,0x19]
-@ CHECK: ldc2l p10, c2, [r11], #16 @ encoding: [0xfb,0xfc,0x04,0x2a]
-@ CHECK: ldc2l p11, c3, [r12], #-72 @ encoding: [0x7c,0xfc,0x12,0x3b]
+@ CHECK: ldc2l p0, c2, [r11], #16 @ encoding: [0xfb,0xfc,0x04,0x20]
+@ CHECK: ldc2l p1, c3, [r12], #-72 @ encoding: [0x7c,0xfc,0x12,0x31]
@ CHECK: ldc p12, c4, [r0, #4] @ encoding: [0x90,0xed,0x01,0x4c]
@ CHECK: ldc p13, c5, [r1] @ encoding: [0x91,0xed,0x00,0x5d]
@------------------------------------------------------------------------------
ldr.w r5, _foo
ldr lr, (_strcmp-4)
+ ldr sp, _foo
@ CHECK: ldr.w r5, _foo @ encoding: [0x5f'A',0xf8'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w r5, _foo @ encoding: [0xf8'A',0x5f'A',0x50'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK: ldr.w lr, _strcmp-4 @ encoding: [0x5f'A',0xf8'A',A,0xe0'A']
@ CHECK: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w lr, _strcmp-4 @ encoding: [0xf8'A',0x5f'A',0xe0'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
+@ CHECK: ldr.w sp, _foo @ encoding: [0x5f'A',0xf8'A',A,0xd0'A']
+@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldr.w sp, _foo @ encoding: [0xf8'A',0x5f'A',0xd0'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
+ ldr r7, [pc, #8]
+ ldr.n r7, [pc, #8]
+ ldr.w r7, [pc, #8]
ldr r4, [pc, #1020]
ldr r3, [pc, #-1020]
ldr r6, [pc, #1024]
ldr r0, [pc, #-1024]
ldr r2, [pc, #4095]
ldr r1, [pc, #-4095]
- ldr.n r8, [pc, #132]
- ldr.w r8, [pc, #132]
-
-@ CHECK: ldr r4, [pc, #1020] @ encoding: [0xff,0x4c]
-@ CHECK: ldr r3, [pc, #-1020] @ encoding: [0x01,0x4b]
-@ CHECK: ldr.w r6, [pc, #1024] @ encoding: [0xdf,0xf8,0x00,0x64]
-@ CHECK: ldr.w r0, [pc, #-1024] @ encoding: [0x5f,0xf8,0x00,0x04]
-@ CHECK: ldr.w r2, [pc, #4095] @ encoding: [0xdf,0xf8,0xff,0x2f]
-@ CHECK: ldr.w r1, [pc, #-4095] @ encoding: [0x5f,0xf8,0xff,0x1f]
-@ CHECK: ldr r8, [pc, #132] @ encoding: [0x21,0x48]
-@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80]
+ ldr r8, [pc, #132]
+ ldr pc, [pc, #256]
+ ldr pc, [pc, #-400]
+ ldr sp, [pc, #4]
+
+@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
+@ CHECK: ldr r7, [pc, #8] @ encoding: [0x02,0x4f]
+@ CHECK: ldr.w r7, [pc, #8] @ encoding: [0xdf,0xf8,0x08,0x70]
+@ CHECK: ldr r4, [pc, #1020] @ encoding: [0xff,0x4c]
+@ CHECK: ldr.w r3, [pc, #-1020] @ encoding: [0x5f,0xf8,0xfc,0x33]
+@ CHECK: ldr.w r6, [pc, #1024] @ encoding: [0xdf,0xf8,0x00,0x64]
+@ CHECK: ldr.w r0, [pc, #-1024] @ encoding: [0x5f,0xf8,0x00,0x04]
+@ CHECK: ldr.w r2, [pc, #4095] @ encoding: [0xdf,0xf8,0xff,0x2f]
+@ CHECK: ldr.w r1, [pc, #-4095] @ encoding: [0x5f,0xf8,0xff,0x1f]
+@ CHECK: ldr.w r8, [pc, #132] @ encoding: [0xdf,0xf8,0x84,0x80]
+@ CHECK: ldr.w pc, [pc, #256] @ encoding: [0xdf,0xf8,0x00,0xf1]
+@ CHECK: ldr.w pc, [pc, #-400] @ encoding: [0x5f,0xf8,0x90,0xf1]
+@ CHECK: ldr.w sp, [pc, #4] @ encoding: [0xdf,0xf8,0x04,0xd0]
+
+ ldrb r9, [pc, #-0]
+ ldrsb r11, [pc, #-0]
+ ldrh r10, [pc, #-0]
+ ldrsh r1, [pc, #-0]
+ ldr r5, [pc, #-0]
+
+@ CHECK: ldrb.w r9, [pc, #-0] @ encoding: [0x1f,0xf8,0x00,0x90]
+@ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
+@ CHECK: ldrh.w r10, [pc, #-0] @ encoding: [0x3f,0xf8,0x00,0xa0]
+@ CHECK: ldrsh.w r1, [pc, #-0] @ encoding: [0x3f,0xf9,0x00,0x10]
+@ CHECK: ldr.w r5, [pc, #-0] @ encoding: [0x5f,0xf8,0x00,0x50]
@------------------------------------------------------------------------------
@ LDR(register)
@ CHECK: ldrh.w r5, _bar @ encoding: [0x3f'A',0xf8'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrh.w r5, _bar @ encoding: [0xf8'A',0x3f'A',0x50'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@------------------------------------------------------------------------------
@ CHECK: ldrsb.w r5, _bar @ encoding: [0x1f'A',0xf9'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrsb.w r5, _bar @ encoding: [0xf9'A',0x1f'A',0x50'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@------------------------------------------------------------------------------
@ CHECK: ldrsh.w r5, _bar @ encoding: [0x3f'A',0xf9'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
+@ CHECK-BE: ldrsh.w r5, _bar @ encoding: [0xf9'A',0x3f'A',0x50'A',A]
+@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_ldst_pcrel_12
@ TEMPORARILY DISABLED:
@ ldrsh.w r4, [pc, #1435]
movlo r1, #-1
@ alias for mvn
- mov r3, #-3
+ mov r3, #-3
+ mov r11, #0xabcd
+ movs r0, #1
+ it ne
+ movne r3, #15
+ itt eq
+ moveq r0, #255
+ moveq r1, #256
@ CHECK: movs r1, #21 @ encoding: [0x15,0x21]
@ CHECK: movs.w r1, #21 @ encoding: [0x5f,0xf0,0x15,0x01]
@ CHECK: it lo @ encoding: [0x38,0xbf]
@ CHECK: movlo.w r1, #-1 @ encoding: [0x4f,0xf0,0xff,0x31]
@ CHECK: mvn r3, #2 @ encoding: [0x6f,0xf0,0x02,0x03]
+@ CHECK: movw r11, #43981 @ encoding: [0x4a,0xf6,0xcd,0x3b]
+@ CHECK: movs r0, #1 @ encoding: [0x01,0x20]
+@ CHECK: it ne @ encoding: [0x18,0xbf]
+@ CHECK: movne r3, #15 @ encoding: [0x0f,0x23]
+
+@ CHECK: itt eq @ encoding: [0x04,0xbf]
+@ CHECK: moveq r0, #255 @ encoding: [0xff,0x20]
+@ CHECK: movweq r1, #256 @ encoding: [0x40,0xf2,0x00,0x11]
@------------------------------------------------------------------------------
@ MOV(shifted register)
@------------------------------------------------------------------------------
mrc p14, #0, r1, c1, c2, #4
mrc p15, #7, apsr_nzcv, c15, c6, #6
- mrc p11, #1, r1, c2, c2
+ mrc p9, #1, r1, c2, c2
mrc2 p12, #3, r3, c3, c4
mrc2 p14, #0, r1, c1, c2, #4
- mrc2 p10, #7, apsr_nzcv, c15, c0, #1
+ mrc2 p8, #7, apsr_nzcv, c15, c0, #1
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e]
@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xff,0xee,0xd6,0xff]
-@ CHECK: mrc p11, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x1b]
+@ CHECK: mrc p9, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x19]
@ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
-@ CHECK: mrc2 p10, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xfa]
+@ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8]
@------------------------------------------------------------------------------
@ MRRC/MRRC2
stc2l p7, c1, [r8]
stc2l p8, c0, [r9, #-224]
stc2l p9, c1, [r10, #-120]!
- stc2l p10, c2, [r11], #16
- stc2l p11, c3, [r12], #-72
+ stc2l p0, c2, [r11], #16
+ stc2l p1, c3, [r12], #-72
stc p12, c4, [r0, #4]
stc p13, c5, [r1]
@ CHECK: stc2l p7, c1, [r8] @ encoding: [0xc8,0xfd,0x00,0x17]
@ CHECK: stc2l p8, c0, [r9, #-224] @ encoding: [0x49,0xfd,0x38,0x08]
@ CHECK: stc2l p9, c1, [r10, #-120]! @ encoding: [0x6a,0xfd,0x1e,0x19]
-@ CHECK: stc2l p10, c2, [r11], #16 @ encoding: [0xeb,0xfc,0x04,0x2a]
-@ CHECK: stc2l p11, c3, [r12], #-72 @ encoding: [0x6c,0xfc,0x12,0x3b]
+@ CHECK: stc2l p0, c2, [r11], #16 @ encoding: [0xeb,0xfc,0x04,0x20]
+@ CHECK: stc2l p1, c3, [r12], #-72 @ encoding: [0x6c,0xfc,0x12,0x31]
@ CHECK: stc p12, c4, [r0, #4] @ encoding: [0x80,0xed,0x01,0x4c]
@ CHECK: stc p13, c5, [r1] @ encoding: [0x81,0xed,0x00,0x5d]
strd r0, r1, [r2, #-0]
strd r0, r1, [r2, #-0]!
strd r0, r1, [r2], #-0
+ strd r0, r1, [r2, #256]
+ strd r0, r1, [r2, #256]!
+ strd r0, r1, [r2], #256
@ CHECK: strd r3, r5, [r6, #24] @ encoding: [0xc6,0xe9,0x06,0x35]
@ CHECK: strd r3, r5, [r6, #24]! @ encoding: [0xe6,0xe9,0x06,0x35]
@ CHECK: strd r0, r1, [r2, #-0] @ encoding: [0x42,0xe9,0x00,0x01]
@ CHECK: strd r0, r1, [r2, #-0]! @ encoding: [0x62,0xe9,0x00,0x01]
@ CHECK: strd r0, r1, [r2], #-0 @ encoding: [0x62,0xe8,0x00,0x01]
+@ CHECK: strd r0, r1, [r2, #256] @ encoding: [0xc2,0xe9,0x40,0x01]
+@ CHECK: strd r0, r1, [r2, #256]! @ encoding: [0xe2,0xe9,0x40,0x01]
+@ CHECK: strd r0, r1, [r2], #256 @ encoding: [0xe2,0xe8,0x40,0x01]
@------------------------------------------------------------------------------
wfige
yieldlt
hint.w #4
+ hint.w #3
+ hint.w #2
+ hint.w #1
+ hint.w #0
+ hint #4
hint #3
hint #2
hint #1
hint #0
+ itet lt
+ hintlt #15
+ hintge #16
+ hintlt #239
+
@ CHECK: wfe @ encoding: [0x20,0xbf]
@ CHECK: wfi @ encoding: [0x30,0xbf]
@ CHECK: yield @ encoding: [0x10,0xbf]
@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80]
@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80]
@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80]
+@ CHECK: sev @ encoding: [0x40,0xbf]
+@ CHECK: wfi @ encoding: [0x30,0xbf]
+@ CHECK: wfe @ encoding: [0x20,0xbf]
+@ CHECK: yield @ encoding: [0x10,0xbf]
+@ CHECK: nop @ encoding: [0x00,0xbf]
+
+@ CHECK: itet lt @ encoding: [0xb6,0xbf]
+@ CHECK: hintlt #15 @ encoding: [0xf0,0xbf]
+@ CHECK: hintge.w #16 @ encoding: [0xaf,0xf3,0x10,0x80]
+@ CHECK: hintlt.w #239 @ encoding: [0xaf,0xf3,0xef,0x80]
+@------------------------------------------------------------------------------
+@ Unallocated wide/narrow hints
+@------------------------------------------------------------------------------
+ hint #7
+ hint.w #7
+@ CHECK: hint #7 @ encoding: [0x70,0xbf]
+@ CHECK: hint.w #7 @ encoding: [0xaf,0xf3,0x07,0x80]
@------------------------------------------------------------------------------
@ Alternate syntax for LDR*(literal) encodings