ARM: Fix pseudo-instructions for SRS (Store Return State).

[oota-llvm.git] / test / MC / ARM / basic-arm-instructions.s

diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index aaff80ca35d96967e8a78557ee677428415f8bd6..354830561b9c6f918ca297569c81b223de80d520 100644 (file)
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -2125,15 +2125,15 @@ Lforward:
 @ CHECK: srsia sp!, #2                 @ encoding: [0x02,0x05,0xed,0xf8]
 @ CHECK: srsib sp!, #14                @ encoding: [0x0e,0x05,0xed,0xf9]
 
-@ CHECK: srsda sp, #11                 @ encoding: [0x0b,0x05,0x4d,0xf8]
-@ CHECK: srsdb sp, #10                 @ encoding: [0x0a,0x05,0x4d,0xf9]
-@ CHECK: srsia sp, #9                  @ encoding: [0x09,0x05,0xcd,0xf8]
-@ CHECK: srsib sp, #5                  @ encoding: [0x05,0x05,0xcd,0xf9]
+@ CHECK: srsib sp, #11                 @ encoding: [0x0b,0x05,0xcd,0xf9]
+@ CHECK: srsia sp, #10                 @ encoding: [0x0a,0x05,0xcd,0xf8]
+@ CHECK: srsdb sp, #9                  @ encoding: [0x09,0x05,0x4d,0xf9]
+@ CHECK: srsda sp, #5                  @ encoding: [0x05,0x05,0x4d,0xf8]
 
-@ CHECK: srsda sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf8]
-@ CHECK: srsdb sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf9]
-@ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]
 @ CHECK: srsib sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf9]
+@ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]
+@ CHECK: srsdb sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf9]
+@ CHECK: srsda sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf8]
 
 @ CHECK: srsia sp, #5                  @ encoding: [0x05,0x05,0xcd,0xf8]
 @ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]
@@ -2170,14 +2170,14 @@ Lforward:
 @ CHECK: srsdb sp!, #19                @ encoding: [0x13,0x05,0x6d,0xf9]
 @ CHECK: srsia sp!, #2                 @ encoding: [0x02,0x05,0xed,0xf8]
 @ CHECK: srsib sp!, #14                @ encoding: [0x0e,0x05,0xed,0xf9]
-@ CHECK: srsda sp, #11                 @ encoding: [0x0b,0x05,0x4d,0xf8]
-@ CHECK: srsdb sp, #10                 @ encoding: [0x0a,0x05,0x4d,0xf9]
-@ CHECK: srsia sp, #9                  @ encoding: [0x09,0x05,0xcd,0xf8]
-@ CHECK: srsib sp, #5                  @ encoding: [0x05,0x05,0xcd,0xf9]
-@ CHECK: srsda sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf8]
-@ CHECK: srsdb sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf9]
-@ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]
+@ CHECK: srsib sp, #11                 @ encoding: [0x0b,0x05,0xcd,0xf9]
+@ CHECK: srsia sp, #10                 @ encoding: [0x0a,0x05,0xcd,0xf8]
+@ CHECK: srsdb sp, #9                  @ encoding: [0x09,0x05,0x4d,0xf9]
+@ CHECK: srsda sp, #5                  @ encoding: [0x05,0x05,0x4d,0xf8]
 @ CHECK: srsib sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf9]
+@ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]
+@ CHECK: srsdb sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf9]
+@ CHECK: srsda sp!, #5                 @ encoding: [0x05,0x05,0x6d,0xf8]
 @ CHECK: srsia sp, #5                  @ encoding: [0x05,0x05,0xcd,0xf8]
 @ CHECK: srsia sp!, #5                 @ encoding: [0x05,0x05,0xed,0xf8]