[NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces

[oota-llvm.git] / test / CodeGen / XCore / store.ll

diff --git a/test/CodeGen/XCore/store.ll b/test/CodeGen/XCore/store.ll
index 2213743ff897b535a7b552412e6334b84fe2cfd1..a42b444bdff46b47a00450137a65e28f58faea56 100644 (file)
--- a/test/CodeGen/XCore/store.ll
+++ b/test/CodeGen/XCore/store.ll
@@ -1,35 +1,37 @@
-; RUN: llc < %s -march=xcore > %t1.s
-; RUN: not grep add %t1.s
-; RUN: not grep ldaw %t1.s
-; RUN: not grep lda16 %t1.s
-; RUN: grep "stw" %t1.s | count 2
-; RUN: grep "st16" %t1.s | count 1
-; RUN: grep "st8" %t1.s | count 1
+; RUN: llc < %s -march=xcore | FileCheck %s
 
 define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
 entry:
-       %0 = getelementptr i32* %p, i32 %offset
+; CHECK-LABEL: store32:
+; CHECK: stw r2, r0[r1]
+       %0 = getelementptr i32, i32* %p, i32 %offset
        store i32 %val, i32* %0, align 4
        ret void
 }
 
 define void @store32_imm(i32* %p, i32 %val) nounwind {
 entry:
-       %0 = getelementptr i32* %p, i32 11
+; CHECK-LABEL: store32_imm:
+; CHECK: stw r1, r0[11]
+       %0 = getelementptr i32, i32* %p, i32 11
        store i32 %val, i32* %0, align 4
        ret void
 }
 
 define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
 entry:
-       %0 = getelementptr i16* %p, i32 %offset
+; CHECK-LABEL: store16:
+; CHECK: st16 r2, r0[r1]
+       %0 = getelementptr i16, i16* %p, i32 %offset
        store i16 %val, i16* %0, align 2
        ret void
 }
 
 define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
 entry:
-       %0 = getelementptr i8* %p, i32 %offset
+; CHECK-LABEL: store8:
+; CHECK: st8 r2, r0[r1]
+       %0 = getelementptr i8, i8* %p, i32 %offset
        store i8 %val, i8* %0, align 1
        ret void
 }