ret i32 %2
}
; CHECK: f3:
-; CHECK-NEXT: ashr r1, r0, 32
+; CHECK-NEXT: ashr r0, r0, 32
+; CHECK-NEXT: bf r0
; CHECK-NEXT: ldc r0, 10
-; CHECK-NEXT: bt r1
; CHECK: ldc r0, 17
define i32 @f4(i32 %a) {
ret i32 %2
}
; CHECK: f4:
-; CHECK-NEXT: ashr r1, r0, 32
+; CHECK-NEXT: ashr r0, r0, 32
+; CHECK-NEXT: bf r0
; CHECK-NEXT: ldc r0, 17
-; CHECK-NEXT: bt r1
; CHECK: ldc r0, 10
define i32 @f5(i32 %a) {