-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64
; Though it is undefined, we want xor undef,undef to produce zero.
define <4 x i32> @test1() nounwind {
ret <4 x i32> %tmp
; X32: test1:
-; X32: pxor %xmm0, %xmm0
+; X32: xorps %xmm0, %xmm0
; X32: ret
}
ret i32 %tmp4
; X64: test3:
-; X64: notl %esi
-; X64: andl %edi, %esi
-; X64: movl %esi, %eax
-; X64: shrl %eax
+; X64: notl
+; X64: andl
+; X64: shrl
; X64: ret
; X32: test3:
bb12:
ret i16 %tmp3
; X64: test5:
-; X64: notw [[REG:%[a-z]+]]
-; X64: andw {{.*}}[[REG]]
+; X64: notl [[REG:%[a-z]+]]
+; X64: andl {{.*}}[[REG]]
; X32: test5:
-; X32: notw [[REG:%[a-z]+]]
-; X32: andw {{.*}}[[REG]]
+; X32: notl [[REG:%[a-z]+]]
+; X32: andl {{.*}}[[REG]]
}
define i8 @test6(i8 %a, i8 %b) nounwind {
%t2 = add i32 %t1, -1
ret i32 %t2
; X64: test8:
-; X64: notl %eax
+; X64: notl {{%eax|%edi|%ecx}}
; X32: test8:
; X32: notl %eax
}