ARM: partially handle 32-bit relocations for WoA

[oota-llvm.git] / test / CodeGen / X86 / xor-icmp.ll

diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll
index 2d75c5d762010d77f64b82717688f6559067b334..dd1fcca48f6159ca1cc686bdf4c5879f13e79ea8 100644 (file)
--- a/test/CodeGen/X86/xor-icmp.ll
+++ b/test/CodeGen/X86/xor-icmp.ll
@@ -4,18 +4,18 @@
 
 define i32 @t(i32 %a, i32 %b) nounwind ssp {
 entry:
-; X32:     t:
+; X32-LABEL:     t:
 ; X32:     xorb
 ; X32-NOT: andb
 ; X32-NOT: shrb
 ; X32:     testb $64
-; X32:     jne
+; X32:     je
 
-; X64:     t:
+; X64-LABEL:     t:
 ; X64-NOT: setne
 ; X64:     xorl
 ; X64:     testb $64
-; X64:     jne
+; X64:     je
   %0 = and i32 %a, 16384
   %1 = icmp ne i32 %0, 0
   %2 = and i32 %b, 16384
@@ -37,7 +37,7 @@ declare i32 @foo(...)
 declare i32 @bar(...)
 
 define i32 @t2(i32 %x, i32 %y) nounwind ssp {
-; X32: t2:
+; X32-LABEL: t2:
 ; X32: cmpl
 ; X32: sete
 ; X32: cmpl
@@ -45,7 +45,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp {
 ; X32-NOT: xor
 ; X32: je
 
-; X64: t2:
+; X64-LABEL: t2:
 ; X64: testl
 ; X64: sete
 ; X64: testl