-; RUN: llc -march=x86 -mattr=+sse42 < %s | FileCheck %s
-; CHECK: paddd
+; RUN: llc -march=x86 -mcpu=generic -mattr=+sse4.2 < %s | FileCheck %s
+; RUN: llc -march=x86 -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
+
; CHECK: movl
+; CHECK: paddw
; CHECK: movlpd
+; Scheduler causes produce a different instruction order
+; ATOM: movl
+; ATOM: paddw
+; ATOM: movlpd
+
; bitcast a v4i16 to v2i32
define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {