AVX-512: fixed extended load to 512-bit register

[oota-llvm.git] / test / CodeGen / X86 / widen_cast-1.ll

diff --git a/test/CodeGen/X86/widen_cast-1.ll b/test/CodeGen/X86/widen_cast-1.ll
index d115929f5aab784d4e74402952dac2e9c362db82..b0240ddb043334bcfbbaa3b1ea6066f1fbd4405e 100644 (file)
--- a/test/CodeGen/X86/widen_cast-1.ll
+++ b/test/CodeGen/X86/widen_cast-1.ll
@@ -2,13 +2,15 @@
 ; RUN: llc -march=x86 -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
 
 ; CHECK: movl
-; CHECK: paddd
-; CHECK: movlpd
+; CHECK: paddw
+; CHECK: movq
+
+; FIXME - if this test cares about scheduling, why isn't it being checked?
 
 ; Scheduler causes produce a different instruction order
 ; ATOM: movl
-; ATOM: paddd
-; ATOM: movlpd
+; ATOM: paddw
+; ATOM: movq
 
 ; bitcast a v4i16 to v2i32
 
@@ -23,25 +25,25 @@ entry:
        br label %forcond
 
 forcond:               ; preds = %forinc, %entry
-       %tmp = load i32* %i             ; <i32> [#uses=1]
+       %tmp = load i32, i32* %i                ; <i32> [#uses=1]
        %cmp = icmp slt i32 %tmp, 4             ; <i1> [#uses=1]
        br i1 %cmp, label %forbody, label %afterfor
 
 forbody:               ; preds = %forcond
-       %tmp1 = load i32* %i            ; <i32> [#uses=1]
-       %tmp2 = load <2 x i32>** %dst.addr              ; <<2 x i32>*> [#uses=1]
-       %arrayidx = getelementptr <2 x i32>* %tmp2, i32 %tmp1           ; <<2 x i32>*> [#uses=1]
-       %tmp3 = load i32* %i            ; <i32> [#uses=1]
-       %tmp4 = load <4 x i16>** %src.addr              ; <<4 x i16>*> [#uses=1]
-       %arrayidx5 = getelementptr <4 x i16>* %tmp4, i32 %tmp3          ; <<4 x i16>*> [#uses=1]
-       %tmp6 = load <4 x i16>* %arrayidx5              ; <<4 x i16>> [#uses=1]
+       %tmp1 = load i32, i32* %i               ; <i32> [#uses=1]
+       %tmp2 = load <2 x i32>*, <2 x i32>** %dst.addr          ; <<2 x i32>*> [#uses=1]
+       %arrayidx = getelementptr <2 x i32>, <2 x i32>* %tmp2, i32 %tmp1                ; <<2 x i32>*> [#uses=1]
+       %tmp3 = load i32, i32* %i               ; <i32> [#uses=1]
+       %tmp4 = load <4 x i16>*, <4 x i16>** %src.addr          ; <<4 x i16>*> [#uses=1]
+       %arrayidx5 = getelementptr <4 x i16>, <4 x i16>* %tmp4, i32 %tmp3               ; <<4 x i16>*> [#uses=1]
+       %tmp6 = load <4 x i16>, <4 x i16>* %arrayidx5           ; <<4 x i16>> [#uses=1]
        %add = add <4 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1 >              ; <<4 x i16>> [#uses=1]
        %conv = bitcast <4 x i16> %add to <2 x i32>             ; <<2 x i32>> [#uses=1]
        store <2 x i32> %conv, <2 x i32>* %arrayidx
        br label %forinc
 
 forinc:                ; preds = %forbody
-       %tmp7 = load i32* %i            ; <i32> [#uses=1]
+       %tmp7 = load i32, i32* %i               ; <i32> [#uses=1]
        %inc = add i32 %tmp7, 1         ; <i32> [#uses=1]
        store i32 %inc, i32* %i
        br label %forcond