[X86][SSE] Sign extension for target vector sizes less than 128 bits (pt1)

[oota-llvm.git] / test / CodeGen / X86 / vshift-5.ll

diff --git a/test/CodeGen/X86/vshift-5.ll b/test/CodeGen/X86/vshift-5.ll
index cb254aeb5735024b75b3b2a8f459a020a8d7954e..a6ae8d54bef176f605546737b56143f27e894128 100644 (file)
--- a/test/CodeGen/X86/vshift-5.ll
+++ b/test/CodeGen/X86/vshift-5.ll
@@ -4,10 +4,10 @@
 
 define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
 entry:
-; CHECK: shift5a:
+; CHECK-LABEL: shift5a:
 ; CHECK: movd
-; CHECK-NEXT: pslld
-  %amt = load i32* %pamt 
+; CHECK: pslld
+  %amt = load i32, i32* %pamt 
   %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
   %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 
   %shl = shl <4 x i32> %val, %shamt
@@ -18,10 +18,10 @@ entry:
 
 define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
 entry:
-; CHECK: shift5b:
+; CHECK-LABEL: shift5b:
 ; CHECK: movd
-; CHECK-NEXT: psrad
-  %amt = load i32* %pamt 
+; CHECK: psrad
+  %amt = load i32, i32* %pamt 
   %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
   %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer 
   %shr = ashr <4 x i32> %val, %shamt
@@ -32,9 +32,9 @@ entry:
 
 define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
 entry:
-; CHECK: shift5c:
+; CHECK-LABEL: shift5c:
 ; CHECK: movd
-; CHECK-NEXT: pslld
+; CHECK: pslld
   %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
   %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
   %shl = shl <4 x i32> %val, %shamt
@@ -45,9 +45,9 @@ entry:
 
 define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
 entry:
-; CHECK: shift5d:
+; CHECK-LABEL: shift5d:
 ; CHECK: movd
-; CHECK-NEXT: psrad
+; CHECK: psrad
   %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
   %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
   %shr = ashr <4 x i32> %val, %shamt