[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / vec_zero_cse.ll

diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll
index b882bad1afffefbe6a30b90d99b5c70bfce8ef96..bda3feff2b005739c74a04549ee7aee9f6ea99f8 100644 (file)
--- a/test/CodeGen/X86/vec_zero_cse.ll
+++ b/test/CodeGen/X86/vec_zero_cse.ll
@@ -1,6 +1,12 @@
-; RUN: llvm-as < %s | llc -relocation-model=static -mcpu=yonah | grep pxor | count 1
-; RUN: llvm-as < %s | llc -relocation-model=static -mcpu=yonah | grep xorps | count 1
-; RUN: llvm-as < %s | llc -relocation-model=static -mcpu=yonah | grep pcmpeqd | count 2
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck -check-prefix CHECK2 %s
+; 64-bit stores here do not use MMX.
+
+; CHECK: xorps
+; CHECK-NOT: xorps
+
+; CHECK2: pcmpeqd
+; CHECK2-NOT: pcmpeqd
 
 @M1 = external global <1 x i64>
 @M2 = external global <2 x i32>