[DAGCombiner] Added CTPOP vector constant folding support.

[oota-llvm.git] / test / CodeGen / X86 / vec_zero_cse.ll

diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll
index 3b15d4cc407bca6588b50084648480b18c0f7c59..8ed8083a284fb242a918b8a98ef6718f56330e53 100644 (file)
--- a/test/CodeGen/X86/vec_zero_cse.ll
+++ b/test/CodeGen/X86/vec_zero_cse.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pxor | count 2
-; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 2
+; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s
+; 64-bit stores here do not use MMX.
 
 @M1 = external global <1 x i64>
 @M2 = external global <2 x i32>
@@ -7,25 +7,33 @@
 @S1 = external global <2 x i64>
 @S2 = external global <4 x i32>
 
-define void @test() {
+define void @test1() {
+;CHECK-LABEL: @test1
+;CHECK: xorps
   store <1 x i64> zeroinitializer, <1 x i64>* @M1
   store <2 x i32> zeroinitializer, <2 x i32>* @M2
   ret void
 }
 
 define void @test2() {
+;CHECK-LABEL: @test2
+;CHECK: pcmpeqd
   store <1 x i64> < i64 -1 >, <1 x i64>* @M1
   store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
   ret void
 }
 
 define void @test3() {
+;CHECK-LABEL: @test3
+;CHECK: xorps
   store <2 x i64> zeroinitializer, <2 x i64>* @S1
   store <4 x i32> zeroinitializer, <4 x i32>* @S2
   ret void
 }
 
 define void @test4() {
+;CHECK-LABEL: @test4
+;CHECK: pcmpeqd
   store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
   store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2
   ret void