[AVX512] add PSLLW and PSLLV Intrinsic

[oota-llvm.git] / test / CodeGen / X86 / vec_zero.ll

diff --git a/test/CodeGen/X86/vec_zero.ll b/test/CodeGen/X86/vec_zero.ll
index 0f94174b34a11cbc16115e3f7083fbfb626316df..1d900a0919f24b0be61786fa9eb08c47d6a60a89 100644 (file)
--- a/test/CodeGen/X86/vec_zero.ll
+++ b/test/CodeGen/X86/vec_zero.ll
@@ -1,15 +1,30 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 | grep xorps | count 2
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
 
-void %foo(<4 x float> *%P) {
-       %T = load <4 x float> * %P
-       %S = add <4 x float> zeroinitializer, %T
-       store <4 x float> %S, <4 x float>* %P
-       ret void
+; CHECK: foo
+; CHECK: xorps
+define void @foo(<4 x float>* %P) {
+        %T = load <4 x float>, <4 x float>* %P               ; <<4 x float>> [#uses=1]
+        %S = fadd <4 x float> zeroinitializer, %T                ; <<4 x float>> [#uses=1]
+        store <4 x float> %S, <4 x float>* %P
+        ret void
 }
 
-void %bar(<4 x int> *%P) {
-       %T = load <4 x int> * %P
-       %S = add <4 x int> zeroinitializer, %T
-       store <4 x int> %S, <4 x int>* %P
-       ret void
+; CHECK: bar
+; CHECK: pxor
+define void @bar(<4 x i32>* %P) {
+        %T = load <4 x i32>, <4 x i32>* %P         ; <<4 x i32>> [#uses=1]
+        %S = sub <4 x i32> zeroinitializer, %T          ; <<4 x i32>> [#uses=1]
+        store <4 x i32> %S, <4 x i32>* %P
+        ret void
+}
+
+; Without any type hints from operations, we fall back to the smaller xorps.
+; The IR type <4 x i32> is ignored.
+; CHECK: untyped_zero
+; CHECK: xorps
+; CHECK: movaps
+define void @untyped_zero(<4 x i32>* %p) {
+entry:
+  store <4 x i32> zeroinitializer, <4 x i32>* %p, align 16
+  ret void
 }