[X86][FMA] Optimize FNEG(FMA) Patterns

[oota-llvm.git] / test / CodeGen / X86 / vec_set-F.ll

diff --git a/test/CodeGen/X86/vec_set-F.ll b/test/CodeGen/X86/vec_set-F.ll
index 4f0acb2d151d9a254d9aed3940b737508224d3d2..aa17f9bfbf5c8a9699308c262fd201a16e848146 100644 (file)
--- a/test/CodeGen/X86/vec_set-F.ll
+++ b/test/CodeGen/X86/vec_set-F.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movsd
-; RUN: llc < %s -march=x86 -mattr=+sse2 | grep mov | count 3
+; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movq
+; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep movsd
+; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | grep mov | count 3
 
 define <2 x i64> @t1(<2 x i64>* %ptr) nounwind  {
        %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>*
-       %tmp615 = load <2 x i32>* %tmp45
+       %tmp615 = load <2 x i32>, <2 x i32>* %tmp45
        %tmp7 = bitcast <2 x i32> %tmp615 to i64
        %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %tmp7, i32 0
        ret <2 x i64> %tmp8