[DAGCombiner] Added CTPOP vector constant folding support.

[oota-llvm.git] / test / CodeGen / X86 / sse_partial_update.ll

diff --git a/test/CodeGen/X86/sse_partial_update.ll b/test/CodeGen/X86/sse_partial_update.ll
index 648b2d29c4a4d7816d5ee99839121702663c859d..377c3b7d6ead5b67a0fd46c40bd3618d4e124394 100644 (file)
--- a/test/CodeGen/X86/sse_partial_update.ll
+++ b/test/CodeGen/X86/sse_partial_update.ll
@@ -9,13 +9,13 @@
 
 define void @rsqrtss(<4 x float> %a) nounwind uwtable ssp {
 entry:
-; CHECK-LABEL: rsqrtss:\r
-; CHECK: rsqrtss %xmm0, %xmm0\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movshdup\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movap\r
-; CHECK-NEXT: jmp\r
+; CHECK-LABEL: rsqrtss:
+; CHECK: rsqrtss %xmm0, %xmm0
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movshdup
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movap
+; CHECK-NEXT: jmp
 
   %0 = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a) nounwind
   %a.addr.0.extract = extractelement <4 x float> %0, i32 0
@@ -30,13 +30,13 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
 
 define void @rcpss(<4 x float> %a) nounwind uwtable ssp {
 entry:
-; CHECK-LABEL: rcpss:\r
-; CHECK: rcpss %xmm0, %xmm0\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movshdup\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movap\r
-; CHECK-NEXT: jmp\r
+; CHECK-LABEL: rcpss:
+; CHECK: rcpss %xmm0, %xmm0
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movshdup
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movap
+; CHECK-NEXT: jmp
 
   %0 = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a) nounwind
   %a.addr.0.extract = extractelement <4 x float> %0, i32 0
@@ -50,13 +50,13 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
 
 define void @sqrtss(<4 x float> %a) nounwind uwtable ssp {
 entry:
-; CHECK-LABEL: sqrtss:\r
-; CHECK: sqrtss %xmm0, %xmm0\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movshdup\r
-; CHECK-NEXT: cvtss2sd %xmm0\r
-; CHECK-NEXT: movap\r
-; CHECK-NEXT: jmp\r
+; CHECK-LABEL: sqrtss:
+; CHECK: sqrtss %xmm0, %xmm0
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movshdup
+; CHECK-NEXT: cvtss2sd %xmm0
+; CHECK-NEXT: movap
+; CHECK-NEXT: jmp
 
   %0 = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %a) nounwind
   %a.addr.0.extract = extractelement <4 x float> %0, i32 0
@@ -67,3 +67,26 @@ entry:
   ret void
 }
 declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
+
+define void @sqrtsd(<2 x double> %a) nounwind uwtable ssp {
+entry:
+; CHECK-LABEL: sqrtsd:
+; CHECK: sqrtsd %xmm0, %xmm0
+; CHECK-NEXT: cvtsd2ss %xmm0
+; CHECK-NEXT: shufpd
+; CHECK-NEXT: cvtsd2ss %xmm0
+; CHECK-NEXT: movap
+; CHECK-NEXT: jmp
+
+ %0 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a) nounwind
+ %a0 = extractelement <2 x double> %0, i32 0
+ %conv = fptrunc double %a0 to float
+ %a1 = extractelement <2 x double> %0, i32 1
+ %conv3 = fptrunc double %a1 to float
+ tail call void @callee2(float %conv, float %conv3) nounwind
+ ret void
+}
+
+declare void @callee2(float, float)
+declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone
+