Add AVX2 variable shift instructions and intrinsics.

[oota-llvm.git] / test / CodeGen / X86 / sse2.ll

diff --git a/test/CodeGen/X86/sse2.ll b/test/CodeGen/X86/sse2.ll
index 6fc019071f8bf4ac669af4419c6055b78434eead..70e0a8a177e051bf0c8bf56afe5f9803ea52b727 100644 (file)
--- a/test/CodeGen/X86/sse2.ll
+++ b/test/CodeGen/X86/sse2.ll
@@ -178,9 +178,9 @@ define <4 x float> @test14(<4 x float>* %x, <4 x float>* %y) nounwind {
         %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 >                ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp27
 ; CHECK: test14:
-; CHECK:       addps   %xmm1, %xmm0
-; CHECK:       subps   %xmm1, %xmm2
-; CHECK:       movlhps %xmm2, %xmm0
+; CHECK:       addps   [[X1:%xmm[0-9]+]], [[X0:%xmm[0-9]+]]
+; CHECK:       subps   [[X1]], [[X2:%xmm[0-9]+]]
+; CHECK:       movlhps [[X2]], [[X0]]
 }
 
 define <4 x float> @test15(<4 x float>* %x, <4 x float>* %y) nounwind {
@@ -192,3 +192,33 @@ entry:
 ; CHECK: test15:
 ; CHECK:       movhlps %xmm1, %xmm0
 }
+
+; PR8900
+; CHECK: test16:
+; CHECK: unpcklpd
+; CHECK: ret
+
+define  <2 x double> @test16(<4 x double> * nocapture %srcA, <2 x double>* nocapture %dst) {
+  %i5 = getelementptr inbounds <4 x double>* %srcA, i32 3
+  %i6 = load <4 x double>* %i5, align 32
+  %i7 = shufflevector <4 x double> %i6, <4 x double> undef, <2 x i32> <i32 0, i32 2>
+  ret <2 x double> %i7
+}
+
+; PR9009
+define fastcc void @test17() nounwind {
+entry:
+  %0 = insertelement <4 x i32> undef, i32 undef, i32 1
+  %1 = shufflevector <4 x i32> <i32 undef, i32 undef, i32 32768, i32 32768>, <4 x i32> %0, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
+  %2 = bitcast <4 x i32> %1 to <4 x float>
+  store <4 x float> %2, <4 x float> * undef
+  ret void
+}
+
+; PR9210
+define <4 x float> @f(<4 x double>) nounwind {
+entry:
+ %double2float.i = fptrunc <4 x double> %0 to <4 x float>
+ ret <4 x float> %double2float.i
+}
+