[X86][SSE] Added full set of 128-bit vector shift tests.

[oota-llvm.git] / test / CodeGen / X86 / setcc.ll

diff --git a/test/CodeGen/X86/setcc.ll b/test/CodeGen/X86/setcc.ll
index 349912c6ed55182267b81c9fbba29d370b4f92d7..6f1ddbdc6aca3a0d01d880c1bcd88fd6b52993f5 100644 (file)
--- a/test/CodeGen/X86/setcc.ll
+++ b/test/CodeGen/X86/setcc.ll
@@ -6,9 +6,9 @@
 
 define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
 entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
 ; CHECK: seta %al
-; CHECK: movzx %al, %eax
+; CHECK: movzbl %al, %eax
 ; CHECK: shll $5, %eax
   %0 = icmp ugt i16 %x, 26                        ; <i1> [#uses=1]
   %iftmp.1.0 = select i1 %0, i16 32, i16 0        ; <i16> [#uses=1]
@@ -17,7 +17,7 @@ entry:
 
 define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
 entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
 ; CHECK: sbbl %eax, %eax
 ; CHECK: andl $32, %eax
   %0 = icmp ult i16 %x, 26                        ; <i1> [#uses=1]
@@ -27,9 +27,9 @@ entry:
 
 define i64 @t3(i64 %x) nounwind readnone ssp {
 entry:
-; CHECK: t3:
+; CHECK-LABEL: t3:
 ; CHECK: sbbq %rax, %rax
-; CHECK: andq $64, %rax
+; CHECK: andl $64, %eax
   %0 = icmp ult i64 %x, 18                        ; <i1> [#uses=1]
   %iftmp.2.0 = select i1 %0, i64 64, i64 0        ; <i64> [#uses=1]
   ret i64 %iftmp.2.0