Temporarily enable MI-Sched on X86.

[oota-llvm.git] / test / CodeGen / X86 / rdrand.ll

diff --git a/test/CodeGen/X86/rdrand.ll b/test/CodeGen/X86/rdrand.ll
index 98f4077763816ccce06c461ee4dd9518ffffd21e..b0d19cb2f40d5d45f8963288a3eedbf3a26cf404 100644 (file)
--- a/test/CodeGen/X86/rdrand.ll
+++ b/test/CodeGen/X86/rdrand.ll
@@ -11,10 +11,10 @@ define i32 @_rdrand16_step(i16* %random_val) {
   ret i32 %isvalid
 ; CHECK: _rdrand16_step:
 ; CHECK: rdrandw       %ax
-; CHECK: movw  %ax, (%r[[A0:di|cx]])
 ; CHECK: movzwl        %ax, %ecx
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %ecx, %eax
+; CHECK: movw  %cx, (%r[[A0:di|cx]])
 ; CHECK: ret
 }
 
@@ -26,9 +26,9 @@ define i32 @_rdrand32_step(i32* %random_val) {
   ret i32 %isvalid
 ; CHECK: _rdrand32_step:
 ; CHECK: rdrandl       %e[[T0:[a-z]+]]
-; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T0]], %eax
+; CHECK: movl  %e[[T0]], (%r[[A0]])
 ; CHECK: ret
 }
 
@@ -40,9 +40,9 @@ define i32 @_rdrand64_step(i64* %random_val) {
   ret i32 %isvalid
 ; CHECK: _rdrand64_step:
 ; CHECK: rdrandq       %r[[T1:[a-z]+]]
-; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: movl  $1, %eax
 ; CHECK: cmovael       %e[[T1]], %eax
+; CHECK: movq  %r[[T1]], (%r[[A0]])
 ; CHECK: ret
 }