-; RUN: llc < %s -march=x86 -post-RA-scheduler=false | FileCheck %s
+; RUN: llc < %s -mcpu=generic -march=x86 -post-RA-scheduler=false | FileCheck %s
; rdar://7226797
; LLVM should omit the testl and use the flags result from the orl.
-; CHECK: or:
+; CHECK-LABEL: or:
define void @or(float* %A, i32 %IA, i32 %N) nounwind {
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
return: ; preds = %entry
ret void
}
-; CHECK: xor:
+; CHECK-LABEL: xor:
define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
return: ; preds = %entry
ret void
}
-; CHECK: and:
+; CHECK-LABEL: and:
define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
entry:
store i8 0, i8* %p
; Just like @and, but without the trunc+store. This should use a testb
; instead of an andl.
-; CHECK: test:
+; CHECK-LABEL: test:
define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
entry:
store i8 0, i8* %p