[X86] update_llc_test_checks vector-shuffle-*. NFC.

[oota-llvm.git] / test / CodeGen / X86 / multiple-loop-post-inc.ll

diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll
index 7491190b01550cd9f67481c35ef10a72e4d1492a..be778da57332fac8b6badcabfcc693bc2256b829 100644 (file)
--- a/test/CodeGen/X86/multiple-loop-post-inc.ll
+++ b/test/CodeGen/X86/multiple-loop-post-inc.ll
@@ -1,9 +1,9 @@
-; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
 ; rdar://7236213
-
-; Xfailed now that scheduler 2-address hack is disabled a lea is generated.
-; The code isn't any worse though.
-; XFAIL: *
+;
+; The scheduler's 2-address hack has been disabled, so there is
+; currently no good guarantee that this test will pass until the
+; machine scheduler develops an equivalent heuristic.
 
 ; CodeGen shouldn't require any lea instructions inside the marked loop.
 ; It should properly set up post-increment uses and do coalescing for
@@ -19,7 +19,7 @@ define void @foo(float* %I, i64 %IS, float* nocapture %Start, float* nocapture %
 entry:
   %times4 = alloca float, align 4                 ; <float*> [#uses=3]
   %timesN = alloca float, align 4                 ; <float*> [#uses=2]
-  %0 = load float* %Step, align 4                 ; <float> [#uses=8]
+  %0 = load float, float* %Step, align 4                 ; <float> [#uses=8]
   %1 = ptrtoint float* %I to i64                  ; <i64> [#uses=1]
   %2 = ptrtoint float* %O to i64                  ; <i64> [#uses=1]
   %tmp = xor i64 %2, %1                           ; <i64> [#uses=1]
@@ -34,11 +34,11 @@ entry:
   br i1 %9, label %bb, label %return
 
 bb:                                               ; preds = %entry
-  %10 = load float* %Start, align 4               ; <float> [#uses=1]
+  %10 = load float, float* %Start, align 4               ; <float> [#uses=1]
   br label %bb2
 
 bb1:                                              ; preds = %bb3
-  %11 = load float* %I_addr.0, align 4            ; <float> [#uses=1]
+  %11 = load float, float* %I_addr.0, align 4            ; <float> [#uses=1]
   %12 = fmul float %11, %x.0                      ; <float> [#uses=1]
   store float %12, float* %O_addr.0, align 4
   %13 = fadd float %x.0, %0                       ; <float> [#uses=1]
@@ -49,8 +49,8 @@ bb2:                                              ; preds = %bb1, %bb
   %14 = phi i64 [ %indvar.next53, %bb1 ], [ 0, %bb ] ; <i64> [#uses=21]
   %x.0 = phi float [ %13, %bb1 ], [ %10, %bb ]    ; <float> [#uses=6]
   %N_addr.0 = sub i64 %N, %14                     ; <i64> [#uses=4]
-  %O_addr.0 = getelementptr float* %O, i64 %14    ; <float*> [#uses=4]
-  %I_addr.0 = getelementptr float* %I, i64 %14    ; <float*> [#uses=3]
+  %O_addr.0 = getelementptr float, float* %O, i64 %14    ; <float*> [#uses=4]
+  %I_addr.0 = getelementptr float, float* %I, i64 %14    ; <float*> [#uses=3]
   %15 = icmp slt i64 %N_addr.0, 1                 ; <i1> [#uses=1]
   br i1 %15, label %bb4, label %bb3
 
@@ -105,32 +105,32 @@ bb5:                                              ; preds = %bb.nph43, %bb5
   %vX1.036 = phi <4 x float> [ %32, %bb.nph43 ], [ %47, %bb5 ] ; <<4 x float>> [#uses=2]
   %tmp104 = shl i64 %indvar102, 4                 ; <i64> [#uses=5]
   %tmp105 = add i64 %14, %tmp104                  ; <i64> [#uses=2]
-  %scevgep106 = getelementptr float* %I, i64 %tmp105 ; <float*> [#uses=1]
+  %scevgep106 = getelementptr float, float* %I, i64 %tmp105 ; <float*> [#uses=1]
   %scevgep106107 = bitcast float* %scevgep106 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp109 = add i64 %tmp108, %tmp104              ; <i64> [#uses=2]
   %tmp112 = add i64 %tmp111, %tmp104              ; <i64> [#uses=2]
-  %scevgep113 = getelementptr float* %I, i64 %tmp112 ; <float*> [#uses=1]
+  %scevgep113 = getelementptr float, float* %I, i64 %tmp112 ; <float*> [#uses=1]
   %scevgep113114 = bitcast float* %scevgep113 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp116 = add i64 %tmp115, %tmp104              ; <i64> [#uses=2]
-  %scevgep117 = getelementptr float* %I, i64 %tmp116 ; <float*> [#uses=1]
+  %scevgep117 = getelementptr float, float* %I, i64 %tmp116 ; <float*> [#uses=1]
   %scevgep117118 = bitcast float* %scevgep117 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp120 = add i64 %tmp119, %tmp104              ; <i64> [#uses=2]
-  %scevgep121 = getelementptr float* %I, i64 %tmp120 ; <float*> [#uses=1]
+  %scevgep121 = getelementptr float, float* %I, i64 %tmp120 ; <float*> [#uses=1]
   %scevgep121122 = bitcast float* %scevgep121 to <4 x float>* ; <<4 x float>*> [#uses=1]
-  %scevgep123 = getelementptr float* %O, i64 %tmp105 ; <float*> [#uses=1]
+  %scevgep123 = getelementptr float, float* %O, i64 %tmp105 ; <float*> [#uses=1]
   %scevgep123124 = bitcast float* %scevgep123 to <4 x float>* ; <<4 x float>*> [#uses=1]
-  %scevgep126 = getelementptr float* %O, i64 %tmp112 ; <float*> [#uses=1]
+  %scevgep126 = getelementptr float, float* %O, i64 %tmp112 ; <float*> [#uses=1]
   %scevgep126127 = bitcast float* %scevgep126 to <4 x float>* ; <<4 x float>*> [#uses=1]
-  %scevgep128 = getelementptr float* %O, i64 %tmp116 ; <float*> [#uses=1]
+  %scevgep128 = getelementptr float, float* %O, i64 %tmp116 ; <float*> [#uses=1]
   %scevgep128129 = bitcast float* %scevgep128 to <4 x float>* ; <<4 x float>*> [#uses=1]
-  %scevgep130 = getelementptr float* %O, i64 %tmp120 ; <float*> [#uses=1]
+  %scevgep130 = getelementptr float, float* %O, i64 %tmp120 ; <float*> [#uses=1]
   %scevgep130131 = bitcast float* %scevgep130 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp132 = mul i64 %indvar102, -16               ; <i64> [#uses=1]
   %tmp136 = add i64 %tmp135, %tmp132              ; <i64> [#uses=2]
-  %36 = load <4 x float>* %scevgep106107, align 16 ; <<4 x float>> [#uses=1]
-  %37 = load <4 x float>* %scevgep113114, align 16 ; <<4 x float>> [#uses=1]
-  %38 = load <4 x float>* %scevgep117118, align 16 ; <<4 x float>> [#uses=1]
-  %39 = load <4 x float>* %scevgep121122, align 16 ; <<4 x float>> [#uses=1]
+  %36 = load <4 x float>, <4 x float>* %scevgep106107, align 16 ; <<4 x float>> [#uses=1]
+  %37 = load <4 x float>, <4 x float>* %scevgep113114, align 16 ; <<4 x float>> [#uses=1]
+  %38 = load <4 x float>, <4 x float>* %scevgep117118, align 16 ; <<4 x float>> [#uses=1]
+  %39 = load <4 x float>, <4 x float>* %scevgep121122, align 16 ; <<4 x float>> [#uses=1]
   %40 = fmul <4 x float> %36, %vX0.039            ; <<4 x float>> [#uses=1]
   %41 = fadd <4 x float> %vX0.039, %asmtmp.i18    ; <<4 x float>> [#uses=2]
   %42 = fmul <4 x float> %37, %vX1.036            ; <<4 x float>> [#uses=1]
@@ -149,8 +149,8 @@ bb5:                                              ; preds = %bb.nph43, %bb5
 
 bb6.bb7_crit_edge:                                ; preds = %bb5
   call void asm sideeffect "# Stop.", "~{dirflag},~{fpsr},~{flags}"() nounwind
-  %scevgep110 = getelementptr float* %I, i64 %tmp109 ; <float*> [#uses=1]
-  %scevgep125 = getelementptr float* %O, i64 %tmp109 ; <float*> [#uses=1]
+  %scevgep110 = getelementptr float, float* %I, i64 %tmp109 ; <float*> [#uses=1]
+  %scevgep125 = getelementptr float, float* %O, i64 %tmp109 ; <float*> [#uses=1]
   br label %bb7
 
 bb7:                                              ; preds = %bb6.bb7_crit_edge, %bb6.preheader
@@ -166,9 +166,9 @@ bb8:                                              ; preds = %bb4
 
 bb.nph:                                           ; preds = %bb8
   %I_addr.0.sum = add i64 %14, -1                 ; <i64> [#uses=1]
-  %49 = getelementptr inbounds float* %I, i64 %I_addr.0.sum ; <float*> [#uses=1]
+  %49 = getelementptr inbounds float, float* %I, i64 %I_addr.0.sum ; <float*> [#uses=1]
   %50 = bitcast float* %49 to <4 x float>*        ; <<4 x float>*> [#uses=1]
-  %51 = load <4 x float>* %50, align 16           ; <<4 x float>> [#uses=1]
+  %51 = load <4 x float>, <4 x float>* %50, align 16           ; <<4 x float>> [#uses=1]
   %tmp54 = add i64 %14, 16                        ; <i64> [#uses=1]
   %tmp56 = add i64 %14, 3                         ; <i64> [#uses=1]
   %tmp60 = add i64 %14, 7                         ; <i64> [#uses=1]
@@ -191,35 +191,35 @@ bb9:                                              ; preds = %bb.nph, %bb9
   %tmp51 = shl i64 %indvar, 4                     ; <i64> [#uses=9]
   %tmp55 = add i64 %tmp54, %tmp51                 ; <i64> [#uses=2]
   %tmp57 = add i64 %tmp56, %tmp51                 ; <i64> [#uses=1]
-  %scevgep58 = getelementptr float* %I, i64 %tmp57 ; <float*> [#uses=1]
+  %scevgep58 = getelementptr float, float* %I, i64 %tmp57 ; <float*> [#uses=1]
   %scevgep5859 = bitcast float* %scevgep58 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp61 = add i64 %tmp60, %tmp51                 ; <i64> [#uses=1]
-  %scevgep62 = getelementptr float* %I, i64 %tmp61 ; <float*> [#uses=1]
+  %scevgep62 = getelementptr float, float* %I, i64 %tmp61 ; <float*> [#uses=1]
   %scevgep6263 = bitcast float* %scevgep62 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp65 = add i64 %tmp64, %tmp51                 ; <i64> [#uses=1]
-  %scevgep66 = getelementptr float* %I, i64 %tmp65 ; <float*> [#uses=1]
+  %scevgep66 = getelementptr float, float* %I, i64 %tmp65 ; <float*> [#uses=1]
   %scevgep6667 = bitcast float* %scevgep66 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp69 = add i64 %tmp68, %tmp51                 ; <i64> [#uses=1]
-  %scevgep70 = getelementptr float* %I, i64 %tmp69 ; <float*> [#uses=1]
+  %scevgep70 = getelementptr float, float* %I, i64 %tmp69 ; <float*> [#uses=1]
   %scevgep7071 = bitcast float* %scevgep70 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp72 = add i64 %14, %tmp51                    ; <i64> [#uses=1]
-  %scevgep73 = getelementptr float* %O, i64 %tmp72 ; <float*> [#uses=1]
+  %scevgep73 = getelementptr float, float* %O, i64 %tmp72 ; <float*> [#uses=1]
   %scevgep7374 = bitcast float* %scevgep73 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp77 = add i64 %tmp76, %tmp51                 ; <i64> [#uses=1]
-  %scevgep78 = getelementptr float* %O, i64 %tmp77 ; <float*> [#uses=1]
+  %scevgep78 = getelementptr float, float* %O, i64 %tmp77 ; <float*> [#uses=1]
   %scevgep7879 = bitcast float* %scevgep78 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp81 = add i64 %tmp80, %tmp51                 ; <i64> [#uses=1]
-  %scevgep82 = getelementptr float* %O, i64 %tmp81 ; <float*> [#uses=1]
+  %scevgep82 = getelementptr float, float* %O, i64 %tmp81 ; <float*> [#uses=1]
   %scevgep8283 = bitcast float* %scevgep82 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp85 = add i64 %tmp84, %tmp51                 ; <i64> [#uses=1]
-  %scevgep86 = getelementptr float* %O, i64 %tmp85 ; <float*> [#uses=1]
+  %scevgep86 = getelementptr float, float* %O, i64 %tmp85 ; <float*> [#uses=1]
   %scevgep8687 = bitcast float* %scevgep86 to <4 x float>* ; <<4 x float>*> [#uses=1]
   %tmp88 = mul i64 %indvar, -16                   ; <i64> [#uses=1]
   %tmp92 = add i64 %tmp91, %tmp88                 ; <i64> [#uses=2]
-  %52 = load <4 x float>* %scevgep5859, align 16  ; <<4 x float>> [#uses=2]
-  %53 = load <4 x float>* %scevgep6263, align 16  ; <<4 x float>> [#uses=2]
-  %54 = load <4 x float>* %scevgep6667, align 16  ; <<4 x float>> [#uses=2]
-  %55 = load <4 x float>* %scevgep7071, align 16  ; <<4 x float>> [#uses=2]
+  %52 = load <4 x float>, <4 x float>* %scevgep5859, align 16  ; <<4 x float>> [#uses=2]
+  %53 = load <4 x float>, <4 x float>* %scevgep6263, align 16  ; <<4 x float>> [#uses=2]
+  %54 = load <4 x float>, <4 x float>* %scevgep6667, align 16  ; <<4 x float>> [#uses=2]
+  %55 = load <4 x float>, <4 x float>* %scevgep7071, align 16  ; <<4 x float>> [#uses=2]
   %56 = shufflevector <4 x float> %vI0.019, <4 x float> %52, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
   %57 = shufflevector <4 x float> %56, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0> ; <<4 x float>> [#uses=1]
   %58 = shufflevector <4 x float> %52, <4 x float> %53, <4 x i32> <i32 4, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=1]
@@ -245,8 +245,8 @@ bb9:                                              ; preds = %bb.nph, %bb9
   br i1 %72, label %bb9, label %bb10.bb11.loopexit_crit_edge
 
 bb10.bb11.loopexit_crit_edge:                     ; preds = %bb9
-  %scevgep = getelementptr float* %I, i64 %tmp55  ; <float*> [#uses=1]
-  %scevgep75 = getelementptr float* %O, i64 %tmp55 ; <float*> [#uses=1]
+  %scevgep = getelementptr float, float* %I, i64 %tmp55  ; <float*> [#uses=1]
+  %scevgep75 = getelementptr float, float* %O, i64 %tmp55 ; <float*> [#uses=1]
   br label %bb11
 
 bb11:                                             ; preds = %bb8, %bb10.bb11.loopexit_crit_edge, %bb7
@@ -261,9 +261,9 @@ bb11:                                             ; preds = %bb8, %bb10.bb11.loo
 bb12:                                             ; preds = %bb11, %bb12
   %indvar94 = phi i64 [ %indvar.next95, %bb12 ], [ 0, %bb11 ] ; <i64> [#uses=3]
   %x.130 = phi float [ %77, %bb12 ], [ %73, %bb11 ] ; <float> [#uses=2]
-  %I_addr.433 = getelementptr float* %I_addr.2, i64 %indvar94 ; <float*> [#uses=1]
-  %O_addr.432 = getelementptr float* %O_addr.2, i64 %indvar94 ; <float*> [#uses=1]
-  %75 = load float* %I_addr.433, align 4          ; <float> [#uses=1]
+  %I_addr.433 = getelementptr float, float* %I_addr.2, i64 %indvar94 ; <float*> [#uses=1]
+  %O_addr.432 = getelementptr float, float* %O_addr.2, i64 %indvar94 ; <float*> [#uses=1]
+  %75 = load float, float* %I_addr.433, align 4          ; <float> [#uses=1]
   %76 = fmul float %75, %x.130                    ; <float> [#uses=1]
   store float %76, float* %O_addr.432, align 4
   %77 = fadd float %x.130, %0                     ; <float> [#uses=2]
@@ -293,7 +293,7 @@ outer:                                     ; preds = %bb1, %entry
 
 inner:                                       ; preds = %bb0, %if.end275
   %i8 = phi i32 [ %a, %outer ], [ %indvar.next159, %bb0 ] ; <i32> [#uses=2]
-  %t338 = load i32* undef                     ; <i32> [#uses=1]
+  %t338 = load i32, i32* undef                     ; <i32> [#uses=1]
   %t191 = mul i32 %i8, %t338        ; <i32> [#uses=1]
   %t179 = add i32 %i6, %t191        ; <i32> [#uses=1]
   br label %bb0