AVX-512: fixed extended load to 512-bit register

[oota-llvm.git] / test / CodeGen / X86 / mingw-alloca.ll

diff --git a/test/CodeGen/X86/mingw-alloca.ll b/test/CodeGen/X86/mingw-alloca.ll
index c0a2f3d734547c529f3ff67651c5042cb17c0f7f..cbad4fbfa2ea53a6649ab47b46fe41ea212b7b75 100644 (file)
--- a/test/CodeGen/X86/mingw-alloca.ll
+++ b/test/CodeGen/X86/mingw-alloca.ll
@@ -1,14 +1,14 @@
-; RUN: llvm-as < %s | llc -o %t -f
-; RUN: grep __alloca %t | count 2
-; RUN: grep 8028 %t
-; RUN: grep {pushl     %eax} %t
-; RUN: grep 8024 %t | count 2
+; RUN: llc < %s -mtriple=i386-pc-mingw32      | FileCheck %s -check-prefix=COFF
+; RUN: llc < %s -mtriple=i386-pc-mingw32-elf  | FileCheck %s -check-prefix=ELF
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "i386-mingw32"
 
-define void @foo1(i32 %N) {
+define void @foo1(i32 %N) nounwind {
 entry:
+; COFF: _foo1:
+; COFF: calll __alloca
+; ELF: foo1:
+; ELF: calll _alloca
        %tmp14 = alloca i32, i32 %N             ; <i32*> [#uses=1]
        call void @bar1( i32* %tmp14 )
        ret void
@@ -16,10 +16,20 @@ entry:
 
 declare void @bar1(i32*)
 
-define void @foo2(i32 inreg  %N) {
+define void @foo2(i32 inreg  %N) nounwind {
 entry:
+; COFF: _foo2:
+; COFF: andl $-16, %esp
+; COFF: pushl %eax
+; COFF: calll __alloca
+; COFF: movl   8028(%esp), %eax
+; ELF: foo2:
+; ELF: andl $-16, %esp
+; ELF: pushl %eax
+; ELF: calll _alloca
+; ELF: movl    8028(%esp), %eax
        %A2 = alloca [2000 x i32], align 16             ; <[2000 x i32]*> [#uses=1]
-       %A2.sub = getelementptr [2000 x i32]* %A2, i32 0, i32 0         ; <i32*> [#uses=1]
+       %A2.sub = getelementptr [2000 x i32], [2000 x i32]* %A2, i32 0, i32 0           ; <i32*> [#uses=1]
        call void @bar2( i32* %A2.sub, i32 %N )
        ret void
 }