[x86] Simplify vector selection if condition value type matches vselect value type...

[oota-llvm.git] / test / CodeGen / X86 / lsr-normalization.ll

diff --git a/test/CodeGen/X86/lsr-normalization.ll b/test/CodeGen/X86/lsr-normalization.ll
index 2c66734995307d11e9181d924eefb726aab9246f..2775558b0cfdb01908c0ed1b25990f637de517e0 100644 (file)
--- a/test/CodeGen/X86/lsr-normalization.ll
+++ b/test/CodeGen/X86/lsr-normalization.ll
@@ -1,5 +1,6 @@
 ; REQUIRES: asserts
-; RUN: llc -debug < %s -march=x86-64 2>&1 | FileCheck %s
+; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=ASM
+; RUN: llc -debug -o /dev/null < %s -march=x86-64 2>&1 | FileCheck %s --check-prefix=DBG
 ; rdar://8168938
 
 ; This testcase involves SCEV normalization with the exit value from
@@ -7,10 +8,9 @@
 ; loop. The expression should be properly normalized and simplified,
 ; and require only a single division.
 
-; CHECK-NOT: DISCARDING (NORMALIZATION ISN'T INVERTIBLE)
-; CHECK: _main:
-; CHECK: div
-; CHECK-NOT: div
+; DBG-NOT: DISCARDING (NORMALIZATION ISN'T INVERTIBLE)
+; ASM: div
+; ASM-NOT: div
 
 %0 = type { %0*, %0* }