[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / loop-blocks.ll

diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll
index 4bd162b45294477b60691c583e948f9de03c5ed4..a81ceb902ab4ead6cea857cb5e240bfadd343c1c 100644 (file)
--- a/test/CodeGen/X86/loop-blocks.ll
+++ b/test/CodeGen/X86/loop-blocks.ll
@@ -6,7 +6,7 @@
 ; CodeGen should insert a branch into the middle of the loop in
 ; order to avoid a branch within the loop.
 
-; CHECK: simple:
+; CHECK-LABEL: simple:
 ;      CHECK:   jmp   .LBB0_1
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB0_2:
@@ -36,7 +36,7 @@ done:
 ; CodeGen should move block_a to the top of the loop so that it
 ; falls through into the loop, avoiding a branch within the loop.
 
-; CHECK: slightly_more_involved:
+; CHECK-LABEL: slightly_more_involved:
 ;      CHECK:   jmp .LBB1_1
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB1_4:
@@ -72,7 +72,7 @@ exit:
 ; fallthrough edges which should be preserved.
 ; "callq block_a_merge_func" is tail duped.
 
-; CHECK: yet_more_involved:
+; CHECK-LABEL: yet_more_involved:
 ;      CHECK:   jmp .LBB2_1
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB2_5:
@@ -132,7 +132,7 @@ exit:
 ; conveniently fit anywhere so that they are at least contiguous with the
 ; loop.
 
-; CHECK: cfg_islands:
+; CHECK-LABEL: cfg_islands:
 ;      CHECK:   jmp     .LBB3_1
 ; CHECK-NEXT:   align
 ; CHECK-NEXT: .LBB3_7: