AVX-512: fixed extended load to 512-bit register

[oota-llvm.git] / test / CodeGen / X86 / lea-4.ll

diff --git a/test/CodeGen/X86/lea-4.ll b/test/CodeGen/X86/lea-4.ll
index 8f0835f642fd0160afc46a244edd62fbb1676ca8..00c2278c54bffeb4721e49281acae43c2d2a38db 100644 (file)
--- a/test/CodeGen/X86/lea-4.ll
+++ b/test/CodeGen/X86/lea-4.ll
@@ -1,19 +1,24 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep lea | count 2
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s
+
 
 define zeroext i16 @t1(i32 %on_off) nounwind {
 entry:
-       %0 = sub i32 %on_off, 1
-       %1 = mul i32 %0, 2
-       %2 = trunc i32 %1 to i16
-       %3 = zext i16 %2 to i32
-       %4 = trunc i32 %3 to i16
-       ret i16 %4
+  %0 = sub i32 %on_off, 1
+  %1 = mul i32 %0, 2
+  %2 = trunc i32 %1 to i16
+  %3 = zext i16 %2 to i32
+  %4 = trunc i32 %3 to i16
+; CHECK: lea
+  ret i16 %4
 }
 
 define i32 @t2(i32 %on_off) nounwind {
 entry:
-       %0 = sub i32 %on_off, 1
-       %1 = mul i32 %0, 2
-        %2 = and i32 %1, 65535
-       ret i32 %2
+  %0 = sub i32 %on_off, 1
+  %1 = mul i32 %0, 2
+  %2 = and i32 %1, 65535
+; CHECK: lea
+  ret i32 %2
 }