Enable the new no-SP register classes by default. This is to address

[oota-llvm.git] / test / CodeGen / X86 / isint.ll

diff --git a/test/CodeGen/X86/isint.ll b/test/CodeGen/X86/isint.ll
index 19e48c7baf1c5ee565fefcc31118f2d1210e5862..7acc5ccf20e7e6cc54a2c70c7d0f761cd08ebbc5 100644 (file)
--- a/test/CodeGen/X86/isint.ll
+++ b/test/CodeGen/X86/isint.ll
@@ -1,12 +1,12 @@
-; RUN: llvm-as < %s | llc -march=x86 > %t
-; not grep cmp %t
-; not grep xor %t
-; grep jne %t | count 1
-; grep jp %t | count 1
-; grep setnp %t | count 1
-; grep sete %t | count 1
-; grep and %t | count 1
-; grep cvt %t | count 4
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 > %t
+; RUN: not grep cmp %t
+; RUN: not grep xor %t
+; RUN: grep jne %t | count 1
+; RUN: grep jp %t | count 1
+; RUN: grep setnp %t | count 1
+; RUN: grep sete %t | count 1
+; RUN: grep and %t | count 1
+; RUN: grep cvt %t | count 4
 
 define i32 @isint_return(double %d) nounwind {
   %i = fptosi double %d to i32