[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / ins_subreg_coalesce-1.ll

diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll
index 863cda94c5fcb3a2eb001950fcbd9d6fa0ddbe05..a74e3f20c41a27b8c5d47cbd471c7b7d89aa5b4c 100644 (file)
--- a/test/CodeGen/X86/ins_subreg_coalesce-1.ll
+++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll
@@ -1,7 +1,13 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2
+; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s
 
-define fastcc i32 @sqlite3ExprResolveNames() nounwind  {
+define fastcc i32 @t() nounwind  {
 entry:
+; CHECK-LABEL: t:
+; CHECK: movzwl 0, %eax
+; CHECK: orl $2, %eax
+; CHECK: movw %ax, 0
+; CHECK: shrl $3, %eax
+; CHECK: andl $1, %eax
        br i1 false, label %UnifiedReturnBlock, label %bb4
 bb4:           ; preds = %entry
        br i1 false, label %bb17, label %bb22