[AVX512] add PSLLW and PSLLV Intrinsic

[oota-llvm.git] / test / CodeGen / X86 / frameaddr.ll

diff --git a/test/CodeGen/X86/frameaddr.ll b/test/CodeGen/X86/frameaddr.ll
index 452c8e5a21af9cfc22944e6bb0b2f82796269358..5ed2ba0f4314813d01d8b1af3427ef9eef88b3ea 100644 (file)
--- a/test/CodeGen/X86/frameaddr.ll
+++ b/test/CodeGen/X86/frameaddr.ll
@@ -1,9 +1,12 @@
 ; RUN: llc < %s -march=x86                                | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -march=x86    -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -march=x86-64                             | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -march=x86-64 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -march=x86    -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc < %s -mtriple=x86_64-pc-win32 -fast-isel | FileCheck %s --check-prefix=CHECK-W64
+; RUN: llc < %s -mtriple=x86_64-unknown                             | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc < %s -mtriple=x86_64-unknown -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-64
 ; RUN: llc < %s -mtriple=x86_64-gnux32                    | FileCheck %s --check-prefix=CHECK-X32ABI
-; RUN: llc < %s -mtriple=x86_64-gnux32 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=CHECK-X32ABI
+; RUN: llc < %s -mtriple=x86_64-gnux32 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-X32ABI
+; RUN: llc < %s -mtriple=x86_64-nacl                    | FileCheck %s --check-prefix=CHECK-NACL64
+; RUN: llc < %s -mtriple=x86_64-nacl -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-NACL64
 
 define i8* @test1() nounwind {
 entry:
@@ -13,6 +16,12 @@ entry:
 ; CHECK-32-NEXT:  movl %ebp, %eax
 ; CHECK-32-NEXT:  pop
 ; CHECK-32-NEXT:  ret
+; CHECK-W64-LABEL: test1
+; CHECK-W64:       push
+; CHECK-W64-NEXT:  movq %rsp, %rbp
+; CHECK-W64-NEXT:  leaq (%rbp), %rax
+; CHECK-W64-NEXT:  pop
+; CHECK-W64-NEXT:  ret
 ; CHECK-64-LABEL: test1
 ; CHECK-64:       push
 ; CHECK-64-NEXT:  movq %rsp, %rbp
@@ -25,6 +34,10 @@ entry:
 ; CHECK-X32ABI-NEXT:  movl %ebp, %eax
 ; CHECK-X32ABI-NEXT:  popq %rbp
 ; CHECK-X32ABI-NEXT:  ret
+; CHECK-NACL64-LABEL: test1
+; CHECK-NACL64:       pushq %rbp
+; CHECK-NACL64-NEXT:  movq %rsp, %rbp
+; CHECK-NACL64-NEXT:  movl %ebp, %eax
   %0 = tail call i8* @llvm.frameaddress(i32 0)
   ret i8* %0
 }
@@ -38,6 +51,12 @@ entry:
 ; CHECK-32-NEXT:  movl (%eax), %eax
 ; CHECK-32-NEXT:  pop
 ; CHECK-32-NEXT:  ret
+; CHECK-W64-LABEL: test2
+; CHECK-W64:       push
+; CHECK-W64-NEXT:  movq %rsp, %rbp
+; CHECK-W64-NEXT:  leaq (%rbp), %rax
+; CHECK-W64-NEXT:  pop
+; CHECK-W64-NEXT:  ret
 ; CHECK-64-LABEL: test2
 ; CHECK-64:       push
 ; CHECK-64-NEXT:  movq %rsp, %rbp
@@ -52,6 +71,11 @@ entry:
 ; CHECK-X32ABI-NEXT:  movl (%eax), %eax
 ; CHECK-X32ABI-NEXT:  popq %rbp
 ; CHECK-X32ABI-NEXT:  ret
+; CHECK-NACL64-LABEL: test2
+; CHECK-NACL64:       pushq %rbp
+; CHECK-NACL64-NEXT:  movq %rsp, %rbp
+; CHECK-NACL64-NEXT:  movl (%ebp), %eax
+; CHECK-NACL64-NEXT:  movl (%eax), %eax
   %0 = tail call i8* @llvm.frameaddress(i32 2)
   ret i8* %0
 }