AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.

[oota-llvm.git] / test / CodeGen / X86 / fold-load.ll

diff --git a/test/CodeGen/X86/fold-load.ll b/test/CodeGen/X86/fold-load.ll
index 6d24113c9bb775ef81aae84510ea92dde61bc40f..8cdc58bb75e03868479e1ac0f56dd5e8ae2db1a2 100644 (file)
--- a/test/CodeGen/X86/fold-load.ll
+++ b/test/CodeGen/X86/fold-load.ll
@@ -1,15 +1,16 @@
-; RUN: llvm-as < %s | llc
+; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s
        %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
        %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 }
 @stmt_obstack = external global %struct.obstack                ; <%struct.obstack*> [#uses=1]
 
-define void @expand_start_bindings() {
+; This should just not crash.
+define void @test1() nounwind {
 entry:
-       br i1 false, label %cond_true, label %cond_next
+       br i1 true, label %cond_true, label %cond_next
 
 cond_true:             ; preds = %entry
        %new_size.0.i = select i1 false, i32 0, i32 0           ; <i32> [#uses=1]
-       %tmp.i = load i32* bitcast (i8* getelementptr (%struct.obstack* @stmt_obstack, i32 0, i32 10) to i32*)          ; <i32> [#uses=1]
+       %tmp.i = load i32, i32* bitcast (i8* getelementptr (%struct.obstack, %struct.obstack* @stmt_obstack, i32 0, i32 10) to i32*)            ; <i32> [#uses=1]
        %tmp.i.upgrd.1 = trunc i32 %tmp.i to i8         ; <i8> [#uses=1]
        %tmp21.i = and i8 %tmp.i.upgrd.1, 1             ; <i8> [#uses=1]
        %tmp22.i = icmp eq i8 %tmp21.i, 0               ; <i1> [#uses=1]
@@ -25,3 +26,48 @@ cond_false30.i:              ; preds = %cond_true
 cond_next:             ; preds = %entry
        ret void
 }
+
+
+
+define i32 @test2(i16* %P, i16* %Q) nounwind {
+  %A = load i16, i16* %P, align 4                      ; <i16> [#uses=11]
+  %C = zext i16 %A to i32                         ; <i32> [#uses=1]
+  %D = and i32 %C, 255                            ; <i32> [#uses=1]
+  br label %L
+L:
+
+  store i16 %A, i16* %Q
+  ret i32 %D
+
+; CHECK-LABEL: test2:
+; CHECK:       movl    4(%esp), %eax
+; CHECK-NEXT:  movzwl  (%eax), %e{{..}}
+
+}
+
+; rdar://10554090
+; xor in exit block will be CSE'ed and load will be folded to xor in entry.
+define i1 @test3(i32* %P, i32* %Q) nounwind {
+; CHECK-LABEL: test3:
+; CHECK: movl 8(%esp), %e
+; CHECK: movl 4(%esp), %e
+; CHECK: xorl (%e
+; CHECK: j
+entry:
+  %0 = load i32, i32* %P, align 4
+  %1 = load i32, i32* %Q, align 4
+  %2 = xor i32 %0, %1
+  %3 = and i32 %2, 89947
+  %4 = icmp eq i32 %3, 0
+  br i1 %4, label %exit, label %land.end
+
+exit:
+  %shr.i.i19 = xor i32 %1, %0
+  %5 = and i32 %shr.i.i19, 3456789123
+  %6 = icmp eq i32 %5, 0
+  br label %land.end
+
+land.end:
+  %7 = phi i1 [ %6, %exit ], [ false, %entry ]
+  ret i1 %7
+}