; CHECK: shl
; CHECK: ret
+; PR17380
+; Make sure that the combined dags are legal if we run the DAGCombiner after
+; Legalization took place. The add instruction is redundant and increases by
+; one the number of uses of the zext. This prevents the transformation from
+; firing before dags are legalized and optimized.
+; Once the add is removed, the number of uses becomes one and therefore the
+; dags are canonicalized. After Legalization, we need to make sure that the
+; valuetype for the shift count is legal.
+; Verify also that we correctly fold the shl-shr sequence into an
+; AND with bitmask.
+
+define void @g(i32 %a) {
+ %b = lshr i32 %a, 2
+ %c = zext i32 %b to i64
+ %d = add i64 %c, 1
+ %e = shl i64 %c, 2
+ tail call void @f(i64 %e)
+ ret void
+}
+
+; CHECK-LABEL: @g
+; CHECK-NOT: shr
+; CHECK-NOT: shl
+; CHECK: and
+; CHECK-NEXT: jmp
+
+declare void @f(i64)
+