If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers...

[oota-llvm.git] / test / CodeGen / X86 / coalescer-commute4.ll

diff --git a/test/CodeGen/X86/coalescer-commute4.ll b/test/CodeGen/X86/coalescer-commute4.ll
index b600a83dfe3dd47c65fe6a4d6d02e2220ec70f8a..7299aca3e0b3679c76e2c8107bd46ae99d7a1cf7 100644 (file)
--- a/test/CodeGen/X86/coalescer-commute4.ll
+++ b/test/CodeGen/X86/coalescer-commute4.ll
@@ -1,7 +1,7 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-apple-darwin -mattr=+sse2 | not grep movaps
 ; PR1501
 
-efine float @foo(i32* %x, float* %y, i32 %c) nounwind  {
+define float @foo(i32* %x, float* %y, i32 %c) nounwind  {
 entry:
        %tmp2132 = icmp eq i32 %c, 0            ; <i1> [#uses=2]
        br i1 %tmp2132, label %bb23, label %bb.preheader