; In this test we check that sign-extend of the mask bit is performed by
; shifting the needed bit to the MSB, and not using shl+sra.
-;CHECK: vsel_float
+;CHECK-LABEL: vsel_float:
;CHECK: movl $-2147483648
;CHECK-NEXT: movd
;CHECK-NEXT: blendvps
ret <4 x float> %vsel
}
-;CHECK: vsel_4xi8
+;CHECK-LABEL: vsel_4xi8:
;CHECK: movl $-2147483648
;CHECK-NEXT: movd
;CHECK-NEXT: blendvps
; We do not have native support for v8i16 blends and we have to use the
; blendvb instruction or a sequence of NAND/OR/AND. Make sure that we do not r
; reduce the mask in this case.
-;CHECK: vsel_8xi16
+;CHECK-LABEL: vsel_8xi16:
;CHECK: psllw
;CHECK: psraw
;CHECK: pblendvb