[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / 2006-10-07-ScalarSSEMiscompile.ll

diff --git a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll
index bf9fa5782b06bca1266965aa8304d6c7d1decf9a..d09d06147696520edb78617f68c9532c449d7fe1 100644 (file)
--- a/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll
+++ b/test/CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll
@@ -5,7 +5,7 @@
 target datalayout = "e-p:32:32"
 target triple = "i686-apple-darwin8.7.2"
 
-define <4 x float> @test(<4 x float> %A, <4 x float>* %B) {
+define <4 x float> @test(<4 x float> %A, <4 x float>* %B) nounwind {
         %BV = load <4 x float>* %B              ; <<4 x float>> [#uses=1]
         %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %A, <4 x float> %BV )       ; <<4 x float>> [#uses=1]
         ret <4 x float> %tmp28