[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / 2006-05-02-InstrSched1.ll

diff --git a/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
index 1c75f93915a7dfdb3e0de56e66026e88bf7d35ee..69266dc4e44ba01fa70679fe3ae1a3af63930e59 100644 (file)
--- a/test/CodeGen/X86/2006-05-02-InstrSched1.ll
+++ b/test/CodeGen/X86/2006-05-02-InstrSched1.ll
@@ -1,6 +1,10 @@
+; REQUIRES: asserts
 ; RUN: llc < %s -march=x86 -relocation-model=static -stats 2>&1 | \
-; RUN:   grep asm-printer | grep 14
+; RUN:   grep asm-printer | grep 16
 ;
+; It's possible to schedule this in 14 instructions by avoiding
+; callee-save registers, but the scheduler isn't currently that
+; conervative with registers.
 @size20 = external global i32          ; <i32*> [#uses=1]
 @in5 = external global i8*             ; <i8**> [#uses=1]
 
@@ -20,4 +24,3 @@ define i32 @compare(i8* %a, i8* %b) nounwind {
 }
 
 declare i32 @memcmp(i8*, i8*, i32)
-