Fix large stack alignment codegen for ARM and Thumb2 targets

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-tbh.ll

diff --git a/test/CodeGen/Thumb2/thumb2-tbh.ll b/test/CodeGen/Thumb2/thumb2-tbh.ll
index 916d4679994538e587151857beada520b11dc1c2..bf1c7c613ab5f124cd35a31f760554e1a13b3182 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-tbh.ll
+++ b/test/CodeGen/Thumb2/thumb2-tbh.ll
@@ -1,7 +1,6 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s
 
 ; Thumb2 target should reorder the bb's in order to use tbb / tbh.
-; XFAIL: *
 
        %struct.R_flstr = type { i32, i32, i8* }
        %struct._T_tstr = type { i32, %struct.R_flstr*, %struct._T_tstr* }
@@ -9,14 +8,14 @@
 @.str31 = external constant [28 x i8], align 1         ; <[28 x i8]*> [#uses=1]
 @_T_gtol = external global %struct._T_tstr*            ; <%struct._T_tstr**> [#uses=2]
 
-declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
+declare i32 @strlen(i8* nocapture) nounwind readonly
 
-declare arm_apcscc void @Z_fatal(i8*) noreturn nounwind
+declare void @Z_fatal(i8*) noreturn nounwind
 
-declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+declare noalias i8* @calloc(i32, i32) nounwind
 
-define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
-; CHECK: main:
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+; CHECK-LABEL: main:
 ; CHECK: tbb
 entry:
        br label %bb42.i
@@ -29,39 +28,39 @@ bb5.i:              ; preds = %bb42.i
        br label %bb40.i
 
 bb7.i:         ; preds = %bb42.i
-       call arm_apcscc  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
+       call  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
        unreachable
 
 bb15.i:                ; preds = %bb42.i
-       call arm_apcscc  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
+       call  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
        unreachable
 
 bb23.i:                ; preds = %bb42.i
-       %1 = call arm_apcscc  i32 @strlen(i8* null) nounwind readonly           ; <i32> [#uses=0]
+       %1 = call  i32 @strlen(i8* null) nounwind readonly              ; <i32> [#uses=0]
        unreachable
 
 bb33.i:                ; preds = %bb42.i
        store i32 0, i32* @_C_nextcmd, align 4
-       %2 = call arm_apcscc  noalias i8* @calloc(i32 21, i32 1) nounwind               ; <i8*> [#uses=0]
+       %2 = call  noalias i8* @calloc(i32 21, i32 1) nounwind          ; <i8*> [#uses=0]
        unreachable
 
 bb34.i:                ; preds = %bb42.i
        %3 = load i32* @_C_nextcmd, align 4             ; <i32> [#uses=1]
        %4 = add i32 %3, 1              ; <i32> [#uses=1]
        store i32 %4, i32* @_C_nextcmd, align 4
-       %5 = call arm_apcscc  noalias i8* @calloc(i32 22, i32 1) nounwind               ; <i8*> [#uses=0]
+       %5 = call  noalias i8* @calloc(i32 22, i32 1) nounwind          ; <i8*> [#uses=0]
        unreachable
 
 bb35.i:                ; preds = %bb42.i
-       %6 = call arm_apcscc  noalias i8* @calloc(i32 20, i32 1) nounwind               ; <i8*> [#uses=0]
+       %6 = call  noalias i8* @calloc(i32 20, i32 1) nounwind          ; <i8*> [#uses=0]
        unreachable
 
 bb37.i:                ; preds = %bb42.i
-       %7 = call arm_apcscc  noalias i8* @calloc(i32 14, i32 1) nounwind               ; <i8*> [#uses=0]
+       %7 = call  noalias i8* @calloc(i32 14, i32 1) nounwind          ; <i8*> [#uses=0]
        unreachable
 
 bb39.i:                ; preds = %bb42.i
-       call arm_apcscc  void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
+       call  void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
        unreachable
 
 bb40.i:                ; preds = %bb42.i, %bb5.i, %bb1.i2
@@ -82,4 +81,4 @@ bb42.i:               ; preds = %bb40.i, %entry
        ]
 }
 
-declare arm_apcscc void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind
+declare void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind