ARM: When spilling extra registers for alignment, prefer low registers on all Thumb...

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-spill-q.ll

diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll
index d1deb461574fae0f652e33333a277cb24de8d716..e0f7b5bd919cdaf9c0ab01807e83c8de519c984a 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-spill-q.ll
+++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll
@@ -43,7 +43,7 @@ entry:
   store float 0.000000e+00, float* undef, align 4
   %ld12 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind
   store float 0.000000e+00, float* undef, align 4
-  %val173 = load <4 x float>* undef               ; <<4 x float>> [#uses=1]
+  %val173 = load <4 x float>, <4 x float>* undef               ; <<4 x float>> [#uses=1]
   br label %bb4
 
 bb4:                                              ; preds = %bb193, %entry