Add GPRPair Register class to ARM.

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-orr2.ll

diff --git a/test/CodeGen/Thumb2/thumb2-orr2.ll b/test/CodeGen/Thumb2/thumb2-orr2.ll
index 759a5b8dd8944acd8fdbcbc34895c4b17c3e9044..8f7a3c2a61a919c4d2a1fdcc630884fbc191ef83 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-orr2.ll
+++ b/test/CodeGen/Thumb2/thumb2-orr2.ll
@@ -1,31 +1,42 @@
-; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep {orr\\W*r\[0-9\]*,\\W*r\[0-9\]*,\\W*#\[0-9\]*} | grep {#187\\|#11141290\\|#-872363008\\|#1145324612\\|#1114112} | count 5
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
+
 
 ; 0x000000bb = 187
 define i32 @f1(i32 %a) {
     %tmp2 = or i32 %a, 187
     ret i32 %tmp2
 }
+; CHECK: f1:
+; CHECK:       orr     r0, r0, #187
 
 ; 0x00aa00aa = 11141290
 define i32 @f2(i32 %a) {
     %tmp2 = or i32 %a, 11141290 
     ret i32 %tmp2
 }
+; CHECK: f2:
+; CHECK:       orr     r0, r0, #11141290
 
 ; 0xcc00cc00 = 3422604288
 define i32 @f3(i32 %a) {
     %tmp2 = or i32 %a, 3422604288
     ret i32 %tmp2
 }
+; CHECK: f3:
+; CHECK:       orr     r0, r0, #-872363008
 
 ; 0x44444444 = 1145324612
 define i32 @f4(i32 %a) {
     %tmp2 = or i32 %a, 1145324612
     ret i32 %tmp2
 }
+; CHECK: f4:
+; CHECK:       orr     r0, r0, #1145324612
 
 ; 0x00110000 = 1114112
 define i32 @f5(i32 %a) {
     %tmp2 = or i32 %a, 1114112
     ret i32 %tmp2
 }
+; CHECK: f5:
+; CHECK:       orr     r0, r0, #1114112