Thumb2SizeReduction: Check the correct set of registers for LDMIA.

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-mls.ll

diff --git a/test/CodeGen/Thumb2/thumb2-mls.ll b/test/CodeGen/Thumb2/thumb2-mls.ll
index 3c26306e41efb4790eb95fcab5a8aee06a4e14dd..9b0e7ff37b698a40384b27d9aa2831c87f375820 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-mls.ll
+++ b/test/CodeGen/Thumb2/thumb2-mls.ll
@@ -1,10 +1,12 @@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {mls\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\],\\W*r\[0-9\]} | Count 1
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
 
 define i32 @f1(i32 %a, i32 %b, i32 %c) {
     %tmp1 = mul i32 %a, %b
     %tmp2 = sub i32 %c, %tmp1
     ret i32 %tmp2
 }
+; CHECK-LABEL: f1:
+; CHECK:       mls     r0, r0, r1, r2
 
 ; sub doesn't commute, so no mls for this one
 define i32 @f2(i32 %a, i32 %b, i32 %c) {
@@ -12,3 +14,6 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) {
     %tmp2 = sub i32 %tmp1, %c
     ret i32 %tmp2
 }
+; CHECK-LABEL: f2:
+; CHECK:       muls    r0, r1, r0
+