Remove some register allocation order dependencies.

[oota-llvm.git] / test / CodeGen / Thumb2 / thumb2-ifcvt1.ll

diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
index 1d267565e06cc9a10a82170dabe13e0a5a61e9f3..af8fcc64124706ad448cc5b59180f03faa9546e4 100644 (file)
--- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
+++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll
@@ -2,8 +2,10 @@
 
 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
 ; CHECK: t1:
-; CHECK: it ne
+; CHECK: ittt ne
 ; CHECK: cmpne
+; CHECK: addne
+; CHECK: bxne lr
        switch i32 %c, label %cond_next [
                 i32 1, label %cond_true
                 i32 7, label %cond_true
@@ -19,13 +21,13 @@ cond_next:
        ret i32 %tmp15
 }
 
-; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt.
 define i32 @t2(i32 %a, i32 %b) nounwind {
 entry:
+; Do not if-convert when branches go to the different loops.
 ; CHECK: t2:
-; CHECK: ite gt
-; CHECK: subgt
-; CHECK: suble
+; CHECK-NOT: ite gt
+; CHECK-NOT: subgt
+; CHECK-NOT: suble
        %tmp1434 = icmp eq i32 %a, %b           ; <i1> [#uses=1]
        br i1 %tmp1434, label %bb17, label %bb.outer
 
@@ -70,13 +72,14 @@ entry:
 define void @t3(i32 %a, i32 %b) nounwind {
 entry:
 ; CHECK: t3:
-; CHECK: it lt
-; CHECK: poplt {r7, pc}
+; CHECK: itt ge
+; CHECK: movge r0, r1
+; CHECK: blge  _foo
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
 cond_true:             ; preds = %entry
-       tail call void @foo( i32 %b )
+       call void @foo( i32 %b )
        ret void
 
 UnifiedReturnBlock:            ; preds = %entry