ARM: make sure ARM-mode pseudo-inst requires IsARM

[oota-llvm.git] / test / CodeGen / Thumb2 / 2009-12-01-LoopIVUsers.ll

diff --git a/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
index 79ad0a91265071479ce4fb611ef9d8e1f1d7e296..524e5a6b7b6824a5016bc54f5545f3831f1433a0 100644 (file)
--- a/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
+++ b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
@@ -1,13 +1,13 @@
 ; RUN: opt < %s -std-compile-opts | \
 ; RUN:   llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
 
-define arm_apcscc void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
+define void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
 entry:
 ; -- The loop following the load should only use a single add-literation
 ;    instruction.
-; CHECK: ldr.64
-; CHECK: adds r{{[0-9]+}}, #1
-; CHECK-NOT: adds r{{[0-9]+}}, #1
+; CHECK: vldr
+; CHECK: adds r{{[0-9]+.*}}#1
+; CHECK-NOT: adds
 ; CHECK: subsections_via_symbols
 
 
@@ -45,7 +45,7 @@ entry:
   store i8* %bp, i8** %bp_addr
   %0 = load i8** %in_addr, align 4                ; <i8*> [#uses=1]
   store i8* %0, i8** %out, align 4
-  %1 = call arm_apcscc  i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+  %1 = call  i32 (...)* @foo() nounwind ; <i32> [#uses=1]
   store i32 %1, i32* %i, align 4
   %2 = load i32* %three_by_three_addr, align 4    ; <i32> [#uses=1]
   %3 = icmp eq i32 %2, 0                          ; <i1> [#uses=1]
@@ -76,7 +76,7 @@ bb3:                                              ; preds = %bb2, %bb
   %15 = load i32* %n_max, align 4                 ; <i32> [#uses=1]
   %16 = load i32* %n_max, align 4                 ; <i32> [#uses=1]
   %17 = mul i32 %15, %16                          ; <i32> [#uses=1]
-  %18 = call arm_apcscc  noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
+  %18 = call  noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
   store i8* %18, i8** %dp, align 4
   %19 = load i8** %dp, align 4                    ; <i8*> [#uses=1]
   store i8* %19, i8** %dpt, align 4
@@ -123,6 +123,6 @@ return:                                           ; preds = %bb6
   ret void
 }
 
-declare arm_apcscc i32 @foo(...)
+declare i32 @foo(...)
 
-declare arm_apcscc noalias i8* @malloc(i32) nounwind
+declare noalias i8* @malloc(i32) nounwind