Added missing CMN case in Thumb2SizeReduction pass so that LLVM emits 16-bits encodin...

[oota-llvm.git] / test / CodeGen / Thumb2 / 2009-11-11-ScavengerAssert.ll

diff --git a/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
index 16db037c18f6ce1244d1f6cc05af70cc342c0028..956263b4fe2d9748ba104935c9eaf799e888283a 100644 (file)
--- a/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
+++ b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -mtriplethumbv7-apple-darwin10
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
 
 %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i32, i16, i16, i8, i8 }
 %struct.SV = type { i8*, i32, i32 }
 
-declare arm_apcscc void @Perl_mg_set(%struct.SV*) nounwind
+declare void @Perl_mg_set(%struct.SV*) nounwind
 
-define arm_apcscc %struct.OP* @Perl_pp_complement() nounwind {
+define %struct.OP* @Perl_pp_complement() nounwind {
 entry:
   %0 = load %struct.SV** null, align 4            ; <%struct.SV*> [#uses=2]
   br i1 undef, label %bb21, label %bb5
@@ -23,7 +23,7 @@ bb7:                                              ; preds = %bb6
   %4 = bitcast i8* %3 to i32*                     ; <i32*> [#uses=1]
   %5 = load i32* %4, align 4                      ; <i32> [#uses=1]
   %storemerge5 = xor i32 %5, -1                   ; <i32> [#uses=1]
-  call arm_apcscc  void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
+  call  void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
   %6 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
   %7 = load i32* %6, align 4                      ; <i32> [#uses=1]
   %8 = and i32 %7, 16384                          ; <i32> [#uses=1]
@@ -34,7 +34,7 @@ bb8:                                              ; preds = %bb6
   unreachable
 
 bb11:                                             ; preds = %bb7
-  call arm_apcscc  void @Perl_mg_set(%struct.SV* undef) nounwind
+  call  void @Perl_mg_set(%struct.SV* undef) nounwind
   br label %bb12
 
 bb12:                                             ; preds = %bb11, %bb7
@@ -42,11 +42,11 @@ bb12:                                             ; preds = %bb11, %bb7
   br label %bb44
 
 bb13:                                             ; preds = %bb5
-  %10 = call arm_apcscc  i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
+  %10 = call  i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
   br i1 undef, label %bb.i, label %bb1.i
 
 bb.i:                                             ; preds = %bb13
-  call arm_apcscc  void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
+  call  void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
   br label %Perl_sv_setuv.exit
 
 bb1.i:                                            ; preds = %bb13
@@ -60,7 +60,7 @@ Perl_sv_setuv.exit:                               ; preds = %bb1.i, %bb.i
   br i1 %14, label %bb20, label %bb19
 
 bb19:                                             ; preds = %Perl_sv_setuv.exit
-  call arm_apcscc  void @Perl_mg_set(%struct.SV* undef) nounwind
+  call  void @Perl_mg_set(%struct.SV* undef) nounwind
   br label %bb20
 
 bb20:                                             ; preds = %bb19, %Perl_sv_setuv.exit
@@ -80,6 +80,6 @@ bb44:                                             ; preds = %bb20, %bb12
   ret %struct.OP* undef
 }
 
-declare arm_apcscc void @Perl_sv_setiv(%struct.SV*, i32) nounwind
+declare void @Perl_sv_setiv(%struct.SV*, i32) nounwind
 
-declare arm_apcscc i32 @Perl_sv_2uv(%struct.SV*) nounwind
+declare i32 @Perl_sv_2uv(%struct.SV*) nounwind