Taints upcoming store and adds bogus conditional branches else where. Now as a separa...

[oota-llvm.git] / test / CodeGen / SystemZ / int-sub-07.ll

diff --git a/test/CodeGen/SystemZ/int-sub-07.ll b/test/CodeGen/SystemZ/int-sub-07.ll
index 5c1f42c1cc969fb93b3e7e50b25ef83d1a811464..1d54fd6714cf82751d354a00fabec61c253584ce 100644 (file)
--- a/test/CodeGen/SystemZ/int-sub-07.ll
+++ b/test/CodeGen/SystemZ/int-sub-07.ll
@@ -8,7 +8,7 @@ define i32 @f1(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f1:
 ; CHECK: sh %r2, 0(%r3)
 ; CHECK: br %r14
-  %half = load i16 *%src
+  %half = load i16 , i16 *%src
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -19,8 +19,8 @@ define i32 @f2(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f2:
 ; CHECK: sh %r2, 4094(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 2047
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 2047
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -31,8 +31,8 @@ define i32 @f3(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f3:
 ; CHECK: shy %r2, 4096(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 2048
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 2048
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -43,8 +43,8 @@ define i32 @f4(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f4:
 ; CHECK: shy %r2, 524286(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 262143
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 262143
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -57,8 +57,8 @@ define i32 @f5(i32 %lhs, i16 *%src) {
 ; CHECK: agfi %r3, 524288
 ; CHECK: sh %r2, 0(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 262144
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 262144
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -69,8 +69,8 @@ define i32 @f6(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f6:
 ; CHECK: shy %r2, -2(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 -1
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 -1
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -81,8 +81,8 @@ define i32 @f7(i32 %lhs, i16 *%src) {
 ; CHECK-LABEL: f7:
 ; CHECK: shy %r2, -524288(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 -262144
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 -262144
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -95,8 +95,8 @@ define i32 @f8(i32 %lhs, i16 *%src) {
 ; CHECK: agfi %r3, -524290
 ; CHECK: sh %r2, 0(%r3)
 ; CHECK: br %r14
-  %ptr = getelementptr i16 *%src, i64 -262145
-  %half = load i16 *%ptr
+  %ptr = getelementptr i16, i16 *%src, i64 -262145
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -110,7 +110,7 @@ define i32 @f9(i32 %lhs, i64 %src, i64 %index) {
   %sub1 = add i64 %src, %index
   %sub2 = add i64 %sub1, 4094
   %ptr = inttoptr i64 %sub2 to i16 *
-  %half = load i16 *%ptr
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res
@@ -124,7 +124,7 @@ define i32 @f10(i32 %lhs, i64 %src, i64 %index) {
   %sub1 = add i64 %src, %index
   %sub2 = add i64 %sub1, 4096
   %ptr = inttoptr i64 %sub2 to i16 *
-  %half = load i16 *%ptr
+  %half = load i16 , i16 *%ptr
   %rhs = sext i16 %half to i32
   %res = sub i32 %lhs, %rhs
   ret i32 %res