[SystemZ] Add truncating high-word stores (STCH and STHH)

[oota-llvm.git] / test / CodeGen / SystemZ / int-mul-08.ll

diff --git a/test/CodeGen/SystemZ/int-mul-08.ll b/test/CodeGen/SystemZ/int-mul-08.ll
index 09ebe7a7b489ad01b02e88e01759fec97e1467fc..90b26a4f3dde326c10abf6504148b3a7cb58427a 100644 (file)
--- a/test/CodeGen/SystemZ/int-mul-08.ll
+++ b/test/CodeGen/SystemZ/int-mul-08.ll
@@ -2,9 +2,11 @@
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 
+declare i64 @foo()
+
 ; Check zero-extended multiplication in which only the high part is used.
 define i64 @f1(i64 %dummy, i64 %a, i64 %b) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK-NOT: {{%r[234]}}
 ; CHECK: mlgr %r2, %r4
 ; CHECK: br %r14
@@ -19,10 +21,14 @@ define i64 @f1(i64 %dummy, i64 %a, i64 %b) {
 ; Check sign-extended multiplication in which only the high part is used.
 ; This needs a rather convoluted sequence.
 define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
-; CHECK: f2:
-; CHECK: mlgr
-; CHECK: agr
-; CHECK: agr
+; CHECK-LABEL: f2:
+; CHECK-DAG: srag [[RES1:%r[0-5]]], %r3, 63
+; CHECK-DAG: srag [[RES2:%r[0-5]]], %r4, 63
+; CHECK-DAG: ngr [[RES1]], %r4
+; CHECK-DAG: ngr [[RES2]], %r3
+; CHECK-DAG: agr [[RES2]], [[RES1]]
+; CHECK-DAG: mlgr %r2, %r4
+; CHECK: sgr %r2, [[RES2]]
 ; CHECK: br %r14
   %ax = sext i64 %a to i128
   %bx = sext i64 %b to i128
@@ -35,7 +41,7 @@ define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
 ; Check zero-extended multiplication in which only part of the high half
 ; is used.
 define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK-NOT: {{%r[234]}}
 ; CHECK: mlgr %r2, %r4
 ; CHECK: srlg %r2, %r2, 3
@@ -51,7 +57,7 @@ define i64 @f3(i64 %dummy, i64 %a, i64 %b) {
 ; Check zero-extended multiplication in which the result is split into
 ; high and low halves.
 define i64 @f4(i64 %dummy, i64 %a, i64 %b) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK-NOT: {{%r[234]}}
 ; CHECK: mlgr %r2, %r4
 ; CHECK: ogr %r2, %r3
@@ -68,7 +74,7 @@ define i64 @f4(i64 %dummy, i64 %a, i64 %b) {
 
 ; Check division by a constant, which should use multiplication instead.
 define i64 @f5(i64 %dummy, i64 %a) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: mlgr %r2,
 ; CHECK: srlg %r2, %r2,
 ; CHECK: br %r14
@@ -78,7 +84,7 @@ define i64 @f5(i64 %dummy, i64 %a) {
 
 ; Check MLG with no displacement.
 define i64 @f6(i64 %dummy, i64 %a, i64 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK-NOT: {{%r[234]}}
 ; CHECK: mlg %r2, 0(%r4)
 ; CHECK: br %r14
@@ -93,7 +99,7 @@ define i64 @f6(i64 %dummy, i64 %a, i64 *%src) {
 
 ; Check the high end of the aligned MLG range.
 define i64 @f7(i64 %dummy, i64 %a, i64 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: mlg %r2, 524280(%r4)
 ; CHECK: br %r14
   %ptr = getelementptr i64 *%src, i64 65535
@@ -109,7 +115,7 @@ define i64 @f7(i64 %dummy, i64 %a, i64 *%src) {
 ; Check the next doubleword up, which requires separate address logic.
 ; Other sequences besides this one would be OK.
 define i64 @f8(i64 %dummy, i64 %a, i64 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK: agfi %r4, 524288
 ; CHECK: mlg %r2, 0(%r4)
 ; CHECK: br %r14
@@ -125,7 +131,7 @@ define i64 @f8(i64 %dummy, i64 %a, i64 *%src) {
 
 ; Check the high end of the negative aligned MLG range.
 define i64 @f9(i64 %dummy, i64 %a, i64 *%src) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
 ; CHECK: mlg %r2, -8(%r4)
 ; CHECK: br %r14
   %ptr = getelementptr i64 *%src, i64 -1
@@ -140,7 +146,7 @@ define i64 @f9(i64 %dummy, i64 %a, i64 *%src) {
 
 ; Check the low end of the MLG range.
 define i64 @f10(i64 %dummy, i64 %a, i64 *%src) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
 ; CHECK: mlg %r2, -524288(%r4)
 ; CHECK: br %r14
   %ptr = getelementptr i64 *%src, i64 -65536
@@ -156,7 +162,7 @@ define i64 @f10(i64 %dummy, i64 %a, i64 *%src) {
 ; Check the next doubleword down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define i64 @f11(i64 *%dest, i64 %a, i64 *%src) {
-; CHECK: f11:
+; CHECK-LABEL: f11:
 ; CHECK: agfi %r4, -524296
 ; CHECK: mlg %r2, 0(%r4)
 ; CHECK: br %r14
@@ -172,7 +178,7 @@ define i64 @f11(i64 *%dest, i64 %a, i64 *%src) {
 
 ; Check that MLG allows an index.
 define i64 @f12(i64 *%dest, i64 %a, i64 %src, i64 %index) {
-; CHECK: f12:
+; CHECK-LABEL: f12:
 ; CHECK: mlg %r2, 524287(%r5,%r4)
 ; CHECK: br %r14
   %add1 = add i64 %src, %index
@@ -186,3 +192,77 @@ define i64 @f12(i64 *%dest, i64 %a, i64 %src, i64 %index) {
   %high = trunc i128 %highx to i64
   ret i64 %high
 }
+
+; Check that multiplications of spilled values can use MLG rather than MLGR.
+define i64 @f13(i64 *%ptr0) {
+; CHECK-LABEL: f13:
+; CHECK: brasl %r14, foo@PLT
+; CHECK: mlg {{%r[0-9]+}}, 160(%r15)
+; CHECK: br %r14
+  %ptr1 = getelementptr i64 *%ptr0, i64 2
+  %ptr2 = getelementptr i64 *%ptr0, i64 4
+  %ptr3 = getelementptr i64 *%ptr0, i64 6
+  %ptr4 = getelementptr i64 *%ptr0, i64 8
+  %ptr5 = getelementptr i64 *%ptr0, i64 10
+  %ptr6 = getelementptr i64 *%ptr0, i64 12
+  %ptr7 = getelementptr i64 *%ptr0, i64 14
+  %ptr8 = getelementptr i64 *%ptr0, i64 16
+  %ptr9 = getelementptr i64 *%ptr0, i64 18
+
+  %val0 = load i64 *%ptr0
+  %val1 = load i64 *%ptr1
+  %val2 = load i64 *%ptr2
+  %val3 = load i64 *%ptr3
+  %val4 = load i64 *%ptr4
+  %val5 = load i64 *%ptr5
+  %val6 = load i64 *%ptr6
+  %val7 = load i64 *%ptr7
+  %val8 = load i64 *%ptr8
+  %val9 = load i64 *%ptr9
+
+  %ret = call i64 @foo()
+
+  %retx = zext i64 %ret to i128
+  %val0x = zext i64 %val0 to i128
+  %mul0d = mul i128 %retx, %val0x
+  %mul0x = lshr i128 %mul0d, 64
+
+  %val1x = zext i64 %val1 to i128
+  %mul1d = mul i128 %mul0x, %val1x
+  %mul1x = lshr i128 %mul1d, 64
+
+  %val2x = zext i64 %val2 to i128
+  %mul2d = mul i128 %mul1x, %val2x
+  %mul2x = lshr i128 %mul2d, 64
+
+  %val3x = zext i64 %val3 to i128
+  %mul3d = mul i128 %mul2x, %val3x
+  %mul3x = lshr i128 %mul3d, 64
+
+  %val4x = zext i64 %val4 to i128
+  %mul4d = mul i128 %mul3x, %val4x
+  %mul4x = lshr i128 %mul4d, 64
+
+  %val5x = zext i64 %val5 to i128
+  %mul5d = mul i128 %mul4x, %val5x
+  %mul5x = lshr i128 %mul5d, 64
+
+  %val6x = zext i64 %val6 to i128
+  %mul6d = mul i128 %mul5x, %val6x
+  %mul6x = lshr i128 %mul6d, 64
+
+  %val7x = zext i64 %val7 to i128
+  %mul7d = mul i128 %mul6x, %val7x
+  %mul7x = lshr i128 %mul7d, 64
+
+  %val8x = zext i64 %val8 to i128
+  %mul8d = mul i128 %mul7x, %val8x
+  %mul8x = lshr i128 %mul8d, 64
+
+  %val9x = zext i64 %val9 to i128
+  %mul9d = mul i128 %mul8x, %val9x
+  %mul9x = lshr i128 %mul9d, 64
+
+  %mul9 = trunc i128 %mul9x to i64
+  ret i64 %mul9
+}