Merging r261368:

[oota-llvm.git] / test / CodeGen / SystemZ / int-move-07.ll

diff --git a/test/CodeGen/SystemZ/int-move-07.ll b/test/CodeGen/SystemZ/int-move-07.ll
index ab21ab03953430237a7b18ac87c4b696250a5683..77713adeebe35d2f3878fed10ed9e188d4d69ca3 100644 (file)
--- a/test/CodeGen/SystemZ/int-move-07.ll
+++ b/test/CodeGen/SystemZ/int-move-07.ll
@@ -4,7 +4,7 @@
 
 ; Check STG with no displacement.
 define void @f1(i64 *%dst, i64 %val) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: stg %r3, 0(%r2)
 ; CHECK: br %r14
   store i64 %val, i64 *%dst
@@ -13,10 +13,10 @@ define void @f1(i64 *%dst, i64 %val) {
 
 ; Check the high end of the aligned STG range.
 define void @f2(i64 *%dst, i64 %val) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK: stg %r3, 524280(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i64 *%dst, i64 65535
+  %ptr = getelementptr i64, i64 *%dst, i64 65535
   store i64 %val, i64 *%ptr
   ret void
 }
@@ -24,31 +24,31 @@ define void @f2(i64 *%dst, i64 %val) {
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f3(i64 *%dst, i64 %val) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: agfi %r2, 524288
 ; CHECK: stg %r3, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i64 *%dst, i64 65536
+  %ptr = getelementptr i64, i64 *%dst, i64 65536
   store i64 %val, i64 *%ptr
   ret void
 }
 
 ; Check the high end of the negative aligned STG range.
 define void @f4(i64 *%dst, i64 %val) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: stg %r3, -8(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i64 *%dst, i64 -1
+  %ptr = getelementptr i64, i64 *%dst, i64 -1
   store i64 %val, i64 *%ptr
   ret void
 }
 
 ; Check the low end of the STG range.
 define void @f5(i64 *%dst, i64 %val) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: stg %r3, -524288(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i64 *%dst, i64 -65536
+  %ptr = getelementptr i64, i64 *%dst, i64 -65536
   store i64 %val, i64 *%ptr
   ret void
 }
@@ -56,18 +56,18 @@ define void @f5(i64 *%dst, i64 %val) {
 ; Check the next doubleword down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f6(i64 *%dst, i64 %val) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK: agfi %r2, -524296
 ; CHECK: stg %r3, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i64 *%dst, i64 -65537
+  %ptr = getelementptr i64, i64 *%dst, i64 -65537
   store i64 %val, i64 *%ptr
   ret void
 }
 
 ; Check that STG allows an index.
 define void @f7(i64 %dst, i64 %index, i64 %val) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: stg %r4, 524287({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %dst, %index