[SystemZ] Fix another assertion failure in tryBuildVectorShuffle

[oota-llvm.git] / test / CodeGen / SystemZ / int-move-02.ll

diff --git a/test/CodeGen/SystemZ/int-move-02.ll b/test/CodeGen/SystemZ/int-move-02.ll
index 467e22d89c5a39a55e7a2c5c964923760baa29ed..7ec0f418502abf892e1d6967dd44487c6292fa4d 100644 (file)
--- a/test/CodeGen/SystemZ/int-move-02.ll
+++ b/test/CodeGen/SystemZ/int-move-02.ll
@@ -4,107 +4,107 @@
 
 ; Check the low end of the L range.
 define i32 @f1(i32 *%src) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: l %r2, 0(%r2)
 ; CHECK: br %r14
-  %val = load i32 *%src
+  %val = load i32 , i32 *%src
   ret i32 %val
 }
 
 ; Check the high end of the aligned L range.
 define i32 @f2(i32 *%src) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK: l %r2, 4092(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 1023
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 1023
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the next word up, which should use LY instead of L.
 define i32 @f3(i32 *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: ly %r2, 4096(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 1024
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 1024
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the high end of the aligned LY range.
 define i32 @f4(i32 *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: ly %r2, 524284(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 131071
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 131071
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the next word up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define i32 @f5(i32 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: agfi %r2, 524288
 ; CHECK: l %r2, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 131072
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 131072
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the high end of the negative aligned LY range.
 define i32 @f6(i32 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK: ly %r2, -4(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 -1
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 -1
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the low end of the LY range.
 define i32 @f7(i32 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: ly %r2, -524288(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 -131072
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 -131072
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check the next word down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define i32 @f8(i32 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK: agfi %r2, -524292
 ; CHECK: l %r2, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr i32 *%src, i64 -131073
-  %val = load i32 *%ptr
+  %ptr = getelementptr i32, i32 *%src, i64 -131073
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check that L allows an index.
 define i32 @f9(i64 %src, i64 %index) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
 ; CHECK: l %r2, 4095({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %src, %index
   %add2 = add i64 %add1, 4095
   %ptr = inttoptr i64 %add2 to i32 *
-  %val = load i32 *%ptr
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }
 
 ; Check that LY allows an index.
 define i32 @f10(i64 %src, i64 %index) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
 ; CHECK: ly %r2, 4096({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %src, %index
   %add2 = add i64 %add1, 4096
   %ptr = inttoptr i64 %add2 to i32 *
-  %val = load i32 *%ptr
+  %val = load i32 , i32 *%ptr
   ret i32 %val
 }