; Test register extension, starting with an i32.
define i64 @f1(i32 %a) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: lgfr %r2, %r2
; CHECK: br %r14
%ext = sext i32 %a to i64
; ...and again with an i64.
define i64 @f2(i64 %a) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: lgfr %r2, %r2
; CHECK: br %r14
%word = trunc i64 %a to i32
; Check LGF with no displacement.
define i64 @f3(i32 *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
%word = load i32 *%src
; Check the high end of the LGF range.
define i64 @f4(i32 *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: lgf %r2, 524284(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 131071
; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f5(i32 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: agfi %r2, 524288
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
; Check the high end of the negative LGF range.
define i64 @f6(i32 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
; CHECK: lgf %r2, -4(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -1
; Check the low end of the LGF range.
define i64 @f7(i32 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
; CHECK: lgf %r2, -524288(%r2)
; CHECK: br %r14
%ptr = getelementptr i32 *%src, i64 -131072
; Check the next word down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i64 @f8(i32 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
; CHECK: agfi %r2, -524292
; CHECK: lgf %r2, 0(%r2)
; CHECK: br %r14
; Check that LGF allows an index.
define i64 @f9(i64 %src, i64 %index) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
; CHECK: lgf %r2, 524287(%r3,%r2)
; CHECK: br %r14
%add1 = add i64 %src, %index