[SystemZ] Add CodeGen support for scalar f64 ops in vector registers

[oota-llvm.git] / test / CodeGen / SystemZ / fp-move-04.ll

diff --git a/test/CodeGen/SystemZ/fp-move-04.ll b/test/CodeGen/SystemZ/fp-move-04.ll
index 72e90d1fffd1c8006d2b62a81c21ec2546f7a25b..6650419b2c389264997c65c533c21ac5ff192951 100644 (file)
--- a/test/CodeGen/SystemZ/fp-move-04.ll
+++ b/test/CodeGen/SystemZ/fp-move-04.ll
@@ -1,110 +1,111 @@
 ; Test 64-bit floating-point loads.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
 
 ; Test the low end of the LD range.
 define double @f1(double *%src) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: br %r14
-  %val = load double *%src
+  %val = load double , double *%src
   ret double %val
 }
 
 ; Test the high end of the LD range.
 define double @f2(double *%src) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK: ld %f0, 4088(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 511
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 511
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the next doubleword up, which should use LDY instead of LD.
 define double @f3(double *%src) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: ldy %f0, 4096(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 512
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 512
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the high end of the aligned LDY range.
 define double @f4(double *%src) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: ldy %f0, 524280(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 65535
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 65535
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the next doubleword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define double @f5(double *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: agfi %r2, 524288
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 65536
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 65536
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the high end of the negative aligned LDY range.
 define double @f6(double *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK: ldy %f0, -8(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 -1
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 -1
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the low end of the LDY range.
 define double @f7(double *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: ldy %f0, -524288(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 -65536
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 -65536
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check the next doubleword down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define double @f8(double *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK: agfi %r2, -524296
 ; CHECK: ld %f0, 0(%r2)
 ; CHECK: br %r14
-  %ptr = getelementptr double *%src, i64 -65537
-  %val = load double *%ptr
+  %ptr = getelementptr double, double *%src, i64 -65537
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check that LD allows an index.
 define double @f9(i64 %src, i64 %index) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
 ; CHECK: ld %f0, 4095({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %src, %index
   %add2 = add i64 %add1, 4095
   %ptr = inttoptr i64 %add2 to double *
-  %val = load double *%ptr
+  %val = load double , double *%ptr
   ret double %val
 }
 
 ; Check that LDY allows an index.
 define double @f10(i64 %src, i64 %index) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
 ; CHECK: ldy %f0, 4096({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %src, %index
   %add2 = add i64 %add1, 4096
   %ptr = inttoptr i64 %add2 to double *
-  %val = load double *%ptr
+  %val = load double , double *%ptr
   ret double %val
 }