; CHECK: [[LOOP:\.[^:]*]]:
; CHECK: cr %r2, %r4
; CHECK: lr [[NEW:%r[0-9]+]], %r2
-; CHECK: j{{g?}}le [[KEEP:\..*]]
+; CHECK: jle [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: j{{g?}}lh [[LOOP]]
+; CHECK: jlh [[LOOP]]
; CHECK: br %r14
%res = atomicrmw min i32 *%src, i32 %b seq_cst
ret i32 %res
; CHECK: [[LOOP:\.[^:]*]]:
; CHECK: cr %r2, %r4
; CHECK: lr [[NEW:%r[0-9]+]], %r2
-; CHECK: j{{g?}}he [[KEEP:\..*]]
+; CHECK: jhe [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: j{{g?}}lh [[LOOP]]
+; CHECK: jlh [[LOOP]]
; CHECK: br %r14
%res = atomicrmw max i32 *%src, i32 %b seq_cst
ret i32 %res
; CHECK: [[LOOP:\.[^:]*]]:
; CHECK: clr %r2, %r4
; CHECK: lr [[NEW:%r[0-9]+]], %r2
-; CHECK: j{{g?}}le [[KEEP:\..*]]
+; CHECK: jle [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: j{{g?}}lh [[LOOP]]
+; CHECK: jlh [[LOOP]]
; CHECK: br %r14
%res = atomicrmw umin i32 *%src, i32 %b seq_cst
ret i32 %res
; CHECK: [[LOOP:\.[^:]*]]:
; CHECK: clr %r2, %r4
; CHECK: lr [[NEW:%r[0-9]+]], %r2
-; CHECK: j{{g?}}he [[KEEP:\..*]]
+; CHECK: jhe [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: j{{g?}}lh [[LOOP]]
+; CHECK: jlh [[LOOP]]
; CHECK: br %r14
%res = atomicrmw umax i32 *%src, i32 %b seq_cst
ret i32 %res
; CHECK: [[LOOP:\.[^:]*]]:
; CHECK: cr %r2, [[LIMIT]]
; CHECK: lr [[NEW:%r[0-9]+]], %r2
-; CHECK: j{{g?}}le [[KEEP:\..*]]
+; CHECK: jle [[KEEP:\..*]]
; CHECK: lr [[NEW]], [[LIMIT]]
; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: j{{g?}}lh [[LOOP]]
+; CHECK: jlh [[LOOP]]
; CHECK: br %r14
%res = atomicrmw min i32 *%ptr, i32 42 seq_cst
ret i32 %res