R600/SI: Custom lower f64 -> i64 conversions

[oota-llvm.git] / test / CodeGen / R600 / uint_to_fp.f64.ll

diff --git a/test/CodeGen/R600/uint_to_fp.f64.ll b/test/CodeGen/R600/uint_to_fp.f64.ll
index 2e926d6999a558c0c0bbca055ab4113468bb2602..1ce022904df9ac24618846a13ae6d505821c1afb 100644 (file)
--- a/test/CodeGen/R600/uint_to_fp.f64.ll
+++ b/test/CodeGen/R600/uint_to_fp.f64.ll
@@ -2,7 +2,7 @@
 
 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
 
-; SI-LABEL: {{$}}uint_to_fp_f64_i32
+; SI-LABEL: {{^}}uint_to_fp_f64_i32
 ; SI: V_CVT_F64_U32_e32
 ; SI: S_ENDPGM
 define void @uint_to_fp_f64_i32(double addrspace(1)* %out, i32 %in) {
@@ -37,7 +37,7 @@ define void @uint_to_fp_i1_f64_load(double addrspace(1)* %out, i1 %in) {
   ret void
 }
 
-; SI-LABEL: {{$}}v_uint_to_fp_i64_to_f64
+; SI-LABEL: {{^}}v_uint_to_fp_i64_to_f64
 ; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
 ; SI-DAG: V_CVT_F64_U32_e32 [[LO_CONV:v\[[0-9]+:[0-9]+\]]], v[[LO]]
 ; SI-DAG: V_CVT_F64_U32_e32 [[HI_CONV:v\[[0-9]+:[0-9]+\]]], v[[HI]]
@@ -53,21 +53,21 @@ define void @v_uint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 addrspace(1)
   ret void
 }
 
-; SI-LABEL: {{$}}s_uint_to_fp_f64_i64
+; SI-LABEL: {{^}}s_uint_to_fp_f64_i64
 define void @s_uint_to_fp_f64_i64(double addrspace(1)* %out, i64 %in) {
   %cast = uitofp i64 %in to double
   store double %cast, double addrspace(1)* %out, align 8
   ret void
 }
 
-; SI-LABEL: {{$}}s_uint_to_fp_v2f64_v2i64
+; SI-LABEL: {{^}}s_uint_to_fp_v2f64_v2i64
 define void @s_uint_to_fp_v2f64_v2i64(<2 x double> addrspace(1)* %out, <2 x i64> %in) {
   %cast = uitofp <2 x i64> %in to <2 x double>
   store <2 x double> %cast, <2 x double> addrspace(1)* %out, align 16
   ret void
 }
 
-; SI-LABEL: {{$}}s_uint_to_fp_v4f64_v4i64
+; SI-LABEL: {{^}}s_uint_to_fp_v4f64_v4i64
 define void @s_uint_to_fp_v4f64_v4i64(<4 x double> addrspace(1)* %out, <4 x i64> %in) {
   %cast = uitofp <4 x i64> %in to <4 x double>
   store <4 x double> %cast, <4 x double> addrspace(1)* %out, align 16