; Make sure there isn't an extra space between the instruction name and first operands.
-; SI-LABEL: @add_f32
+; SI-LABEL: {{^}}add_f32:
; SI-DAG: S_LOAD_DWORD [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
; SI-DAG: S_LOAD_DWORD [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
; SI: V_MOV_B32_e32 [[VREGB:v[0-9]+]], [[SREGB]]