Allow AVX vrsqrtps generation.

[oota-llvm.git] / test / CodeGen / PowerPC / tls.ll

diff --git a/test/CodeGen/PowerPC/tls.ll b/test/CodeGen/PowerPC/tls.ll
index 2274edf8e176936ebe1066b537f876bc18474530..59b4de75598847a7e00920af9ea34291053675ae 100644 (file)
--- a/test/CodeGen/PowerPC/tls.ll
+++ b/test/CodeGen/PowerPC/tls.ll
@@ -1,5 +1,8 @@
 ; RUN: llc -O0 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s
 ; RUN: llc -O1 < %s -march=ppc64 -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s
+; RUN: llc -O0 < %s -march=ppc32 -mcpu=ppc | FileCheck -check-prefix=OPT0-PPC32 %s
+
+target triple = "powerpc64-unknown-linux-gnu"
 
 @a = thread_local global i32 0, align 4
 
@@ -36,3 +39,8 @@ entry:
 ; OPT1: ld [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
 ; OPT1: add {{[0-9]+}}, [[REG2]], a2@tls
 
+;OPT0-PPC32-LABEL:    main2:
+;OPT0-PPC32:       li [[REG1:[0-9]+]], _GLOBAL_OFFSET_TABLE_@l
+;OPT0-PPC32:       addis [[REG1]], [[REG1]], _GLOBAL_OFFSET_TABLE_@ha
+;OPT0-PPC32:       lwz [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
+;OPT0-PPC32:       add 3, [[REG2]], a2@tls