AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all

[oota-llvm.git] / test / CodeGen / PowerPC / rlwimi3.ll

diff --git a/test/CodeGen/PowerPC/rlwimi3.ll b/test/CodeGen/PowerPC/rlwimi3.ll
index a55d88ba1c4581bc3575f2cb81af585587f6d159..31b6d4aa03bc11cfa7ddec4461111cdaf275824f 100644 (file)
--- a/test/CodeGen/PowerPC/rlwimi3.ll
+++ b/test/CodeGen/PowerPC/rlwimi3.ll
@@ -1,25 +1,26 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -stats 2>&1 | grep 'Number of machine instrs printed' | grep 12
+; REQUIRES: asserts
+; RUN: llc < %s -march=ppc32 -stats 2>&1 | \
+; RUN:   grep "Number of machine instrs printed" | grep 12
 
-ushort %Trans16Bit(uint %srcA, uint %srcB, uint %alpha) {
-        %tmp1 = shl uint %srcA, ubyte 15                ; <uint> [#uses=1]
-        %tmp2 = and uint %tmp1, 32505856                ; <uint> [#uses=1]
-        %tmp4 = and uint %srcA, 31775           ; <uint> [#uses=1]
-        %tmp5 = or uint %tmp2, %tmp4            ; <uint> [#uses=1]
-        %tmp7 = shl uint %srcB, ubyte 15                ; <uint> [#uses=1]
-        %tmp8 = and uint %tmp7, 32505856                ; <uint> [#uses=1]
-        %tmp10 = and uint %srcB, 31775          ; <uint> [#uses=1]
-        %tmp11 = or uint %tmp8, %tmp10          ; <uint> [#uses=1]
-        %tmp14 = mul uint %tmp5, %alpha         ; <uint> [#uses=1]
-        %tmp16 = sub uint 32, %alpha            ; <uint> [#uses=1]
-        %tmp18 = mul uint %tmp11, %tmp16                ; <uint> [#uses=1]
-        %tmp19 = add uint %tmp18, %tmp14                ; <uint> [#uses=2]
-        %tmp21 = shr uint %tmp19, ubyte 5               ; <uint> [#uses=1]
-        %tmp21 = cast uint %tmp21 to ushort             ; <ushort> [#uses=1]
-        %tmp = and ushort %tmp21, 31775         ; <ushort> [#uses=1]
-        %tmp23 = shr uint %tmp19, ubyte 20              ; <uint> [#uses=1]
-        %tmp23 = cast uint %tmp23 to ushort             ; <ushort> [#uses=1]
-        %tmp24 = and ushort %tmp23, 992         ; <ushort> [#uses=1]
-        %tmp25 = or ushort %tmp, %tmp24         ; <ushort> [#uses=1]
-        ret ushort %tmp25
+define i16 @Trans16Bit(i32 %srcA, i32 %srcB, i32 %alpha) {
+       %tmp1 = shl i32 %srcA, 15               ; <i32> [#uses=1]
+       %tmp2 = and i32 %tmp1, 32505856         ; <i32> [#uses=1]
+       %tmp4 = and i32 %srcA, 31775            ; <i32> [#uses=1]
+       %tmp5 = or i32 %tmp2, %tmp4             ; <i32> [#uses=1]
+       %tmp7 = shl i32 %srcB, 15               ; <i32> [#uses=1]
+       %tmp8 = and i32 %tmp7, 32505856         ; <i32> [#uses=1]
+       %tmp10 = and i32 %srcB, 31775           ; <i32> [#uses=1]
+       %tmp11 = or i32 %tmp8, %tmp10           ; <i32> [#uses=1]
+       %tmp14 = mul i32 %tmp5, %alpha          ; <i32> [#uses=1]
+       %tmp16 = sub i32 32, %alpha             ; <i32> [#uses=1]
+       %tmp18 = mul i32 %tmp11, %tmp16         ; <i32> [#uses=1]
+       %tmp19 = add i32 %tmp18, %tmp14         ; <i32> [#uses=2]
+       %tmp21 = lshr i32 %tmp19, 5             ; <i32> [#uses=1]
+       %tmp21.upgrd.1 = trunc i32 %tmp21 to i16                ; <i16> [#uses=1]
+       %tmp = and i16 %tmp21.upgrd.1, 31775            ; <i16> [#uses=1]
+       %tmp23 = lshr i32 %tmp19, 20            ; <i32> [#uses=1]
+       %tmp23.upgrd.2 = trunc i32 %tmp23 to i16                ; <i16> [#uses=1]
+       %tmp24 = and i16 %tmp23.upgrd.2, 992            ; <i16> [#uses=1]
+       %tmp25 = or i16 %tmp, %tmp24            ; <i16> [#uses=1]
+       ret i16 %tmp25
 }
-